Import into GitHub
authorlekernel <sebastien.bourdeauducq@lekernel.net>
Mon, 17 Aug 2009 14:58:53 +0000 (16:58 +0200)
committerlekernel <sebastien.bourdeauducq@lekernel.net>
Mon, 17 Aug 2009 14:58:53 +0000 (16:58 +0200)
653 files changed:
README [new file with mode: 0644]
build_binkit_ml401.sh [new file with mode: 0755]
clean_binkit.sh [new file with mode: 0755]
milkymist-core/LICENSE [new file with mode: 0644]
milkymist-core/LICENSE.GD [new file with mode: 0644]
milkymist-core/LICENSE.LATTICE [new file with mode: 0644]
milkymist-core/LICENSE.LGPL [new file with mode: 0644]
milkymist-core/README [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/rtl/ddram.v [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/rtl/setup.v [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/rtl/system.v [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/rtl/vga.v [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/sources.mak [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/Makefile.precision [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/Makefile.synplify [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/Makefile.xst [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/common.mak [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/common.ucf [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/flash.cmd [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/ioffs.sdc [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/load.cmd [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/precision.tcl [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/precision.ucf [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/synplify.prj [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/synplify.ucf [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/system.xst [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/synthesis/xst.ucf [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/test/Makefile [new file with mode: 0644]
milkymist-core/boards/xilinx-ml401/test/system_tb.v [new file with mode: 0644]
milkymist-core/build_bios.sh [new file with mode: 0755]
milkymist-core/build_bitstream.sh [new file with mode: 0755]
milkymist-core/build_demo.sh [new file with mode: 0755]
milkymist-core/build_doc.sh [new file with mode: 0755]
milkymist-core/clean_all.sh [new file with mode: 0755]
milkymist-core/coredoc.inc [new file with mode: 0644]
milkymist-core/cores/ac97/doc/LM4550.pdf [new file with mode: 0644]
milkymist-core/cores/ac97/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/ac97/doc/ac97.tex [new file with mode: 0644]
milkymist-core/cores/ac97/doc/ac97_r23.pdf [new file with mode: 0644]
milkymist-core/cores/ac97/rtl/ac97.v [new file with mode: 0644]
milkymist-core/cores/ac97/rtl/ac97_asfifo.v [new file with mode: 0644]
milkymist-core/cores/ac97/rtl/ac97_ctlif.v [new file with mode: 0644]
milkymist-core/cores/ac97/rtl/ac97_deframer.v [new file with mode: 0644]
milkymist-core/cores/ac97/rtl/ac97_dma.v [new file with mode: 0644]
milkymist-core/cores/ac97/rtl/ac97_framer.v [new file with mode: 0644]
milkymist-core/cores/ac97/rtl/ac97_graycounter.v [new file with mode: 0644]
milkymist-core/cores/ac97/rtl/ac97_transceiver.v [new file with mode: 0644]
milkymist-core/cores/ac97/test/Makefile [new file with mode: 0644]
milkymist-core/cores/ac97/test/tb_ac97.v [new file with mode: 0644]
milkymist-core/cores/aceusb/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/aceusb/doc/aceusb.tex [new file with mode: 0644]
milkymist-core/cores/aceusb/doc/ds080.pdf [new file with mode: 0644]
milkymist-core/cores/aceusb/rtl/aceusb.v [new file with mode: 0644]
milkymist-core/cores/aceusb/rtl/aceusb_access.v [new file with mode: 0644]
milkymist-core/cores/aceusb/rtl/aceusb_sync.v [new file with mode: 0644]
milkymist-core/cores/aceusb/test/Makefile [new file with mode: 0644]
milkymist-core/cores/aceusb/test/tb_aceusb.v [new file with mode: 0644]
milkymist-core/cores/bram/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/bram/doc/bram.tex [new file with mode: 0644]
milkymist-core/cores/bram/rtl/bram.v [new file with mode: 0644]
milkymist-core/cores/conbus/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/conbus/doc/conbus.tex [new file with mode: 0644]
milkymist-core/cores/conbus/rtl/conbus.v [new file with mode: 0644]
milkymist-core/cores/conbus/rtl/conbus_arb.v [new file with mode: 0644]
milkymist-core/cores/conbus/test/Makefile [new file with mode: 0644]
milkymist-core/cores/conbus/test/master.v [new file with mode: 0644]
milkymist-core/cores/conbus/test/slave.v [new file with mode: 0644]
milkymist-core/cores/conbus/test/tb_conbus.v [new file with mode: 0644]
milkymist-core/cores/csrbrg/rtl/csrbrg.v [new file with mode: 0644]
milkymist-core/cores/csrbrg/test/Makefile [new file with mode: 0644]
milkymist-core/cores/csrbrg/test/tb_csrbrg.v [new file with mode: 0644]
milkymist-core/cores/fmlarb/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/fmlarb/doc/fmlarb.tex [new file with mode: 0644]
milkymist-core/cores/fmlarb/rtl/fmlarb.v [new file with mode: 0644]
milkymist-core/cores/fmlbrg/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/fmlbrg/doc/fmlbrg.tex [new file with mode: 0644]
milkymist-core/cores/fmlbrg/rtl/fmlbrg.v [new file with mode: 0644]
milkymist-core/cores/fmlbrg/rtl/fmlbrg_datamem.v [new file with mode: 0644]
milkymist-core/cores/fmlbrg/test/Makefile [new file with mode: 0644]
milkymist-core/cores/fmlbrg/test/tb_fmlbrg.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/doc/HYB25D256.pdf [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/doc/blockdiagram.dia [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/doc/blockdiagram.eps [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/doc/hpdmc.tex [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/rtl/hpdmc.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/rtl/hpdmc_banktimer.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/rtl/hpdmc_busif.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/rtl/hpdmc_ctlif.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/rtl/hpdmc_datactl.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/rtl/hpdmc_ddrio.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/rtl/hpdmc_iddr32.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/rtl/hpdmc_idelay8.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/rtl/hpdmc_mgmt.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/rtl/hpdmc_oddr32.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/rtl/hpdmc_oddr4.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/test/Makefile [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/test/ddr.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/test/ddr_parameters.vh [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/test/iddr.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/test/idelay.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/test/oddr.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/test/subtest.vh [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/test/tb_hpdmc.v [new file with mode: 0644]
milkymist-core/cores/hpdmc_ddr32/test/tb_model.v [new file with mode: 0644]
milkymist-core/cores/lm32/README [new file with mode: 0644]
milkymist-core/cores/lm32/doc/ds_icon.jpg [new file with mode: 0755]
milkymist-core/cores/lm32/doc/lever40.css [new file with mode: 0755]
milkymist-core/cores/lm32/doc/lever40_ns.css [new file with mode: 0755]
milkymist-core/cores/lm32/doc/lm32.htm [new file with mode: 0755]
milkymist-core/cores/lm32/doc/lm32_archman.pdf [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/JTAGB.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/er1.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/jtag_cores.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/jtag_lm32.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_adder.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_addsub.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_cpu.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_dcache.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_debug.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_decoder.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_functions.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_icache.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_include.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_instruction_unit.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_interrupt.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_jtag.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_load_store_unit.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_logic_op.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_mc_arithmetic.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_monitor.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_monitor_ram.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_multiplier.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_ram.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_shifter.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_top.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/lm32_trace.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/spiprog.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/typea.v [new file with mode: 0755]
milkymist-core/cores/lm32/rtl/typeb.v [new file with mode: 0755]
milkymist-core/cores/norflash32/doc/MT28F640J3.pdf [new file with mode: 0644]
milkymist-core/cores/norflash32/rtl/norflash32.v [new file with mode: 0644]
milkymist-core/cores/pfpu/cleanroms.sh [new file with mode: 0755]
milkymist-core/cores/pfpu/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/pfpu/doc/architecture.dia [new file with mode: 0644]
milkymist-core/cores/pfpu/doc/architecture.eps [new file with mode: 0644]
milkymist-core/cores/pfpu/doc/pfpu.tex [new file with mode: 0644]
milkymist-core/cores/pfpu/makeroms.sh [new file with mode: 0755]
milkymist-core/cores/pfpu/roms/sin.rom [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_above.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_addrgen.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_alu.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_clz32.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_copy.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_ctlif.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_dma.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_equal.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_f2i.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_faddsub.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_fdiv.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_fmul.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_i2f.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_prog.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_regf.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_seq.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_sincos.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_tpram.v [new file with mode: 0644]
milkymist-core/cores/pfpu/rtl/pfpu_vect.v [new file with mode: 0644]
milkymist-core/cores/pfpu/scripts/sinrom.c [new file with mode: 0644]
milkymist-core/cores/pfpu/test/alu/Makefile [new file with mode: 0644]
milkymist-core/cores/pfpu/test/alu/tb_alu.v [new file with mode: 0644]
milkymist-core/cores/pfpu/test/clz32/Makefile [new file with mode: 0644]
milkymist-core/cores/pfpu/test/clz32/tb_clz32.v [new file with mode: 0644]
milkymist-core/cores/pfpu/test/complete/Makefile [new file with mode: 0644]
milkymist-core/cores/pfpu/test/complete/tb_pfpu.v [new file with mode: 0644]
milkymist-core/cores/pfpu/test/vpi/Makefile [new file with mode: 0644]
milkymist-core/cores/pfpu/test/vpi/floatconv.c [new file with mode: 0644]
milkymist-core/cores/pfpu/test/vpi/floatconv.o [new file with mode: 0644]
milkymist-core/cores/pfpu/test/vpi/floatconv.so [new file with mode: 0755]
milkymist-core/cores/sysctl/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/sysctl/doc/sysctl.tex [new file with mode: 0644]
milkymist-core/cores/sysctl/rtl/sysctl.v [new file with mode: 0644]
milkymist-core/cores/tmu/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/tmu/doc/architecture.dia [new file with mode: 0644]
milkymist-core/cores/tmu/doc/architecture.dia~ [new file with mode: 0644]
milkymist-core/cores/tmu/doc/architecture.eps [new file with mode: 0644]
milkymist-core/cores/tmu/doc/comm.dia [new file with mode: 0644]
milkymist-core/cores/tmu/doc/comm.eps [new file with mode: 0644]
milkymist-core/cores/tmu/doc/texel_cache.ods [new file with mode: 0644]
milkymist-core/cores/tmu/doc/tmu.tex [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_addresses.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_burst.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_clamp.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_ctlif.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_decay.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_divider11.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_edgediv.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_edgedivops.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_edgetrace.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_meshgen.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_perfcounters.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_pixin.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_pixout.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_reorder.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_scandiv.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_scandivops.v [new file with mode: 0644]
milkymist-core/cores/tmu/rtl/tmu_scantrace.v [new file with mode: 0644]
milkymist-core/cores/tmu/test/Makefile [new file with mode: 0644]
milkymist-core/cores/tmu/test/lena.jpg [new file with mode: 0644]
milkymist-core/cores/tmu/test/tb_tmu.v [new file with mode: 0644]
milkymist-core/cores/tmu/test/vpi_images.c [new file with mode: 0644]
milkymist-core/cores/uart/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/uart/doc/uart.tex [new file with mode: 0644]
milkymist-core/cores/uart/rtl/uart.v [new file with mode: 0644]
milkymist-core/cores/uart/rtl/uart_transceiver.v [new file with mode: 0644]
milkymist-core/cores/vgafb/doc/Makefile [new file with mode: 0644]
milkymist-core/cores/vgafb/doc/vgafb.tex [new file with mode: 0644]
milkymist-core/cores/vgafb/rtl/vgafb.v [new file with mode: 0644]
milkymist-core/cores/vgafb/rtl/vgafb_asfifo.v [new file with mode: 0644]
milkymist-core/cores/vgafb/rtl/vgafb_ctlif.v [new file with mode: 0644]
milkymist-core/cores/vgafb/rtl/vgafb_fifo64to16.v [new file with mode: 0644]
milkymist-core/cores/vgafb/rtl/vgafb_graycounter.v [new file with mode: 0644]
milkymist-core/cores/vgafb/rtl/vgafb_pixelfeed.v [new file with mode: 0644]
milkymist-core/cores/vgafb/test/Makefile [new file with mode: 0644]
milkymist-core/cores/vgafb/test/tb_pixelfeed.v [new file with mode: 0644]
milkymist-core/doc/Makefile [new file with mode: 0644]
milkymist-core/doc/confslides.tex [new file with mode: 0644]
milkymist-core/doc/confslides_overview.tex [new file with mode: 0644]
milkymist-core/doc/csr.tex [new file with mode: 0644]
milkymist-core/doc/csr_topology.dia [new file with mode: 0644]
milkymist-core/doc/csr_topology.eps [new file with mode: 0644]
milkymist-core/doc/dipswitches.txt [new file with mode: 0644]
milkymist-core/doc/distortionsanofi.eps [new file with mode: 0644]
milkymist-core/doc/flow.dia [new file with mode: 0644]
milkymist-core/doc/flow.eps [new file with mode: 0644]
milkymist-core/doc/fml.tex [new file with mode: 0644]
milkymist-core/doc/logo.eps [new file with mode: 0644]
milkymist-core/doc/memlatency.dia [new file with mode: 0644]
milkymist-core/doc/memlatency.eps [new file with mode: 0644]
milkymist-core/doc/microcontroller.dia [new file with mode: 0644]
milkymist-core/doc/microcontroller.eps [new file with mode: 0644]
milkymist-core/doc/milkdrop.tex [new file with mode: 0644]
milkymist-core/doc/milkdrop1.eps [new file with mode: 0644]
milkymist-core/doc/milkdrop2.eps [new file with mode: 0644]
milkymist-core/doc/milkdrop3.eps [new file with mode: 0644]
milkymist-core/doc/ml401.eps [new file with mode: 0644]
milkymist-core/doc/paper_overview.bib [new file with mode: 0644]
milkymist-core/doc/paper_overview.tex [new file with mode: 0644]
milkymist-core/doc/serialdebug.eps [new file with mode: 0644]
milkymist-core/doc/soc_architecture.dia [new file with mode: 0644]
milkymist-core/doc/soc_architecture.eps [new file with mode: 0644]
milkymist-core/doc/swarch.dia [new file with mode: 0644]
milkymist-core/doc/swarch.eps [new file with mode: 0644]
milkymist-core/doc/system.tex [new file with mode: 0644]
milkymist-core/doc/tesselsanofi.eps [new file with mode: 0644]
milkymist-core/doc/texelcache.eps [new file with mode: 0644]
milkymist-core/doc/tripattern.dia [new file with mode: 0644]
milkymist-core/doc/tripattern.eps [new file with mode: 0644]
milkymist-core/flash_bios.sh [new file with mode: 0755]
milkymist-core/flash_bitstream.sh [new file with mode: 0755]
milkymist-core/load_bitstream.sh [new file with mode: 0755]
milkymist-core/load_demo.sh [new file with mode: 0755]
milkymist-core/presets/Geiss - Cosmic Dust 2 Simplified.milk [new file with mode: 0644]
milkymist-core/setup.inc [new file with mode: 0644]
milkymist-core/software/baselib/Makefile [new file with mode: 0644]
milkymist-core/software/baselib/atof.c [new file with mode: 0644]
milkymist-core/software/baselib/board.c [new file with mode: 0644]
milkymist-core/software/baselib/cfcard.c [new file with mode: 0644]
milkymist-core/software/baselib/cffat.c [new file with mode: 0644]
milkymist-core/software/baselib/console.c [new file with mode: 0644]
milkymist-core/software/baselib/crc16.c [new file with mode: 0644]
milkymist-core/software/baselib/crc32.c [new file with mode: 0644]
milkymist-core/software/baselib/divsi3.c [new file with mode: 0644]
milkymist-core/software/baselib/irq.S [new file with mode: 0644]
milkymist-core/software/baselib/libc.c [new file with mode: 0644]
milkymist-core/software/baselib/malloc.c [new file with mode: 0644]
milkymist-core/software/baselib/milieu.h [new file with mode: 0644]
milkymist-core/software/baselib/softfloat-glue.c [new file with mode: 0644]
milkymist-core/software/baselib/softfloat-macros.h [new file with mode: 0644]
milkymist-core/software/baselib/softfloat-specialize.h [new file with mode: 0644]
milkymist-core/software/baselib/softfloat.c [new file with mode: 0644]
milkymist-core/software/baselib/softfloat.h [new file with mode: 0644]
milkymist-core/software/baselib/system.c [new file with mode: 0644]
milkymist-core/software/baselib/uart-async.c [new file with mode: 0644]
milkymist-core/software/baselib/uart.c [new file with mode: 0644]
milkymist-core/software/baselib/vsnprintf-nofloat.c [new file with mode: 0644]
milkymist-core/software/baselib/vsnprintf.c [new file with mode: 0644]
milkymist-core/software/bios/Makefile [new file with mode: 0644]
milkymist-core/software/bios/boot.c [new file with mode: 0644]
milkymist-core/software/bios/boot.h [new file with mode: 0644]
milkymist-core/software/bios/crt0.S [new file with mode: 0644]
milkymist-core/software/bios/linker.ld [new file with mode: 0644]
milkymist-core/software/bios/main.c [new file with mode: 0644]
milkymist-core/software/demo/Makefile [new file with mode: 0644]
milkymist-core/software/demo/analyzer.c [new file with mode: 0644]
milkymist-core/software/demo/analyzer.h [new file with mode: 0644]
milkymist-core/software/demo/apipe.c [new file with mode: 0644]
milkymist-core/software/demo/apipe.h [new file with mode: 0644]
milkymist-core/software/demo/ast.h [new file with mode: 0644]
milkymist-core/software/demo/bandfilters.sce [new file with mode: 0644]
milkymist-core/software/demo/brd.c [new file with mode: 0644]
milkymist-core/software/demo/brd.h [new file with mode: 0644]
milkymist-core/software/demo/color.h [new file with mode: 0644]
milkymist-core/software/demo/compiler.c [new file with mode: 0644]
milkymist-core/software/demo/compiler.h [new file with mode: 0644]
milkymist-core/software/demo/cpustats.c [new file with mode: 0644]
milkymist-core/software/demo/cpustats.h [new file with mode: 0644]
milkymist-core/software/demo/crt0.S [new file with mode: 0644]
milkymist-core/software/demo/eval.c [new file with mode: 0644]
milkymist-core/software/demo/eval.h [new file with mode: 0644]
milkymist-core/software/demo/hdlcd.c [new file with mode: 0644]
milkymist-core/software/demo/hdlcd.h [new file with mode: 0644]
milkymist-core/software/demo/isr.c [new file with mode: 0644]
milkymist-core/software/demo/line.c [new file with mode: 0644]
milkymist-core/software/demo/line.h [new file with mode: 0644]
milkymist-core/software/demo/linker.ld [new file with mode: 0644]
milkymist-core/software/demo/main.c [new file with mode: 0644]
milkymist-core/software/demo/mem.c [new file with mode: 0644]
milkymist-core/software/demo/mem.h [new file with mode: 0644]
milkymist-core/software/demo/parser.y [new file with mode: 0644]
milkymist-core/software/demo/parser_helper.c [new file with mode: 0644]
milkymist-core/software/demo/parser_helper.h [new file with mode: 0644]
milkymist-core/software/demo/pfpu.c [new file with mode: 0644]
milkymist-core/software/demo/pfpu.h [new file with mode: 0644]
milkymist-core/software/demo/renderer.c [new file with mode: 0644]
milkymist-core/software/demo/renderer.h [new file with mode: 0644]
milkymist-core/software/demo/rpipe.c [new file with mode: 0644]
milkymist-core/software/demo/rpipe.h [new file with mode: 0644]
milkymist-core/software/demo/scanner.h [new file with mode: 0644]
milkymist-core/software/demo/scanner.re [new file with mode: 0644]
milkymist-core/software/demo/scheduler.c [new file with mode: 0644]
milkymist-core/software/demo/scheduler.h [new file with mode: 0644]
milkymist-core/software/demo/shell.c [new file with mode: 0644]
milkymist-core/software/demo/shell.h [new file with mode: 0644]
milkymist-core/software/demo/slowout.c [new file with mode: 0644]
milkymist-core/software/demo/slowout.h [new file with mode: 0644]
milkymist-core/software/demo/snd.c [new file with mode: 0644]
milkymist-core/software/demo/snd.h [new file with mode: 0644]
milkymist-core/software/demo/spam.xpm [new file with mode: 0644]
milkymist-core/software/demo/time.c [new file with mode: 0644]
milkymist-core/software/demo/time.h [new file with mode: 0644]
milkymist-core/software/demo/tmu.c [new file with mode: 0644]
milkymist-core/software/demo/tmu.h [new file with mode: 0644]
milkymist-core/software/demo/ui.c [new file with mode: 0644]
milkymist-core/software/demo/ui.h [new file with mode: 0644]
milkymist-core/software/demo/vga.c [new file with mode: 0644]
milkymist-core/software/demo/vga.h [new file with mode: 0644]
milkymist-core/software/demo/wave.c [new file with mode: 0644]
milkymist-core/software/demo/wave.h [new file with mode: 0644]
milkymist-core/software/include.mak [new file with mode: 0644]
milkymist-core/software/include/board.h [new file with mode: 0644]
milkymist-core/software/include/cfcard.h [new file with mode: 0644]
milkymist-core/software/include/cffat.h [new file with mode: 0644]
milkymist-core/software/include/console.h [new file with mode: 0644]
milkymist-core/software/include/crc.h [new file with mode: 0644]
milkymist-core/software/include/endian.h [new file with mode: 0644]
milkymist-core/software/include/hw/ac97.h [new file with mode: 0644]
milkymist-core/software/include/hw/common.h [new file with mode: 0644]
milkymist-core/software/include/hw/fmlbrg.h [new file with mode: 0644]
milkymist-core/software/include/hw/gpio.h [new file with mode: 0644]
milkymist-core/software/include/hw/hpdmc.h [new file with mode: 0644]
milkymist-core/software/include/hw/interrupts.h [new file with mode: 0644]
milkymist-core/software/include/hw/pfpu.h [new file with mode: 0644]
milkymist-core/software/include/hw/sram.h [new file with mode: 0644]
milkymist-core/software/include/hw/sysctl.h [new file with mode: 0644]
milkymist-core/software/include/hw/systemace.h [new file with mode: 0644]
milkymist-core/software/include/hw/tmu.h [new file with mode: 0644]
milkymist-core/software/include/hw/uart.h [new file with mode: 0644]
milkymist-core/software/include/hw/vga.h [new file with mode: 0644]
milkymist-core/software/include/irq.h [new file with mode: 0644]
milkymist-core/software/include/libc.h [new file with mode: 0644]
milkymist-core/software/include/malloc.h [new file with mode: 0644]
milkymist-core/software/include/math.h [new file with mode: 0644]
milkymist-core/software/include/stdarg.h [new file with mode: 0644]
milkymist-core/software/include/stdio.h [new file with mode: 0644]
milkymist-core/software/include/stdlib.h [new file with mode: 0644]
milkymist-core/software/include/string.h [new file with mode: 0644]
milkymist-core/software/include/system.h [new file with mode: 0644]
milkymist-core/software/include/uart.h [new file with mode: 0644]
milkymist-core/software/include/version.h [new file with mode: 0644]
milkymist-core/software/mathlib/Makefile [new file with mode: 0644]
milkymist-core/software/mathlib/acosf.c [new file with mode: 0644]
milkymist-core/software/mathlib/asincosf.c [new file with mode: 0644]
milkymist-core/software/mathlib/asinf.c [new file with mode: 0644]
milkymist-core/software/mathlib/atan2f.c [new file with mode: 0644]
milkymist-core/software/mathlib/atanf.c [new file with mode: 0644]
milkymist-core/software/mathlib/ceilf.c [new file with mode: 0644]
milkymist-core/software/mathlib/cosf.c [new file with mode: 0644]
milkymist-core/software/mathlib/coshf.c [new file with mode: 0644]
milkymist-core/software/mathlib/cotf.c [new file with mode: 0644]
milkymist-core/software/mathlib/expf.c [new file with mode: 0644]
milkymist-core/software/mathlib/fabsf.c [new file with mode: 0644]
milkymist-core/software/mathlib/floorf.c [new file with mode: 0644]
milkymist-core/software/mathlib/frexpf.c [new file with mode: 0644]
milkymist-core/software/mathlib/ldexpf.c [new file with mode: 0644]
milkymist-core/software/mathlib/log10f.c [new file with mode: 0644]
milkymist-core/software/mathlib/logf.c [new file with mode: 0644]
milkymist-core/software/mathlib/modff.c [new file with mode: 0644]
milkymist-core/software/mathlib/powf.c [new file with mode: 0644]
milkymist-core/software/mathlib/sincosf.c [new file with mode: 0644]
milkymist-core/software/mathlib/sincoshf.c [new file with mode: 0644]
milkymist-core/software/mathlib/sinf.c [new file with mode: 0644]
milkymist-core/software/mathlib/sinhf.c [new file with mode: 0644]
milkymist-core/software/mathlib/sqrtf.c [new file with mode: 0644]
milkymist-core/software/mathlib/tancotf.c [new file with mode: 0644]
milkymist-core/software/mathlib/tanf.c [new file with mode: 0644]
milkymist-core/software/mathlib/tanhf.c [new file with mode: 0644]
milkymist-core/software/update_depend.sh [new file with mode: 0755]
milkymist-core/splash/splash.png [new file with mode: 0644]
milkymist-core/splash/splash.raw [new file with mode: 0644]
milkymist-core/std/sfl.h [new file with mode: 0644]
milkymist-core/tools/Makefile [new file with mode: 0644]
milkymist-core/tools/bin2hex.c [new file with mode: 0644]
milkymist-core/tools/crc32.c [new file with mode: 0644]
milkymist-core/tools/flterm.c [new file with mode: 0644]
milkymist-core/tools/xdlanalyze.pl [new file with mode: 0755]
ml401-flasher/LICENSE [new file with mode: 0644]
ml401-flasher/README [new file with mode: 0644]
ml401-flasher/board/Makefile [new file with mode: 0644]
ml401-flasher/board/flasher.ucf [new file with mode: 0644]
ml401-flasher/board/flasher.v [new file with mode: 0644]
ml401-flasher/board/flasher.xst [new file with mode: 0644]
ml401-flasher/board/impact.batch [new file with mode: 0644]
ml401-flasher/board/sources.mak [new file with mode: 0644]
ml401-flasher/host/Makefile [new file with mode: 0644]
ml401-flasher/host/flasher.c [new file with mode: 0644]
mtk/CMakeLists.txt [new file with mode: 0644]
mtk/LICENSE [new file with mode: 0644]
mtk/README [new file with mode: 0644]
mtk/doc/Makefile [new file with mode: 0644]
mtk/doc/mtk.tex [new file with mode: 0644]
mtk/include/application.h [new file with mode: 0644]
mtk/include/applicationfactory.h [new file with mode: 0644]
mtk/include/color.h [new file with mode: 0644]
mtk/include/colormodel.h [new file with mode: 0644]
mtk/include/colorschema.h [new file with mode: 0644]
mtk/include/combo.h [new file with mode: 0644]
mtk/include/container.h [new file with mode: 0644]
mtk/include/dc.h [new file with mode: 0644]
mtk/include/environment.h [new file with mode: 0644]
mtk/include/eventcallback.h [new file with mode: 0644]
mtk/include/events.h [new file with mode: 0644]
mtk/include/focus.h [new file with mode: 0644]
mtk/include/focusable.h [new file with mode: 0644]
mtk/include/fontrenderer.h [new file with mode: 0644]
mtk/include/fontschema.h [new file with mode: 0644]
mtk/include/icon.h [new file with mode: 0644]
mtk/include/iconregistry.h [new file with mode: 0644]
mtk/include/imageloader.h [new file with mode: 0644]
mtk/include/keycodes.h [new file with mode: 0644]
mtk/include/label.h [new file with mode: 0644]
mtk/include/linearcontainer.h [new file with mode: 0644]
mtk/include/mtk.h [new file with mode: 0644]
mtk/include/padder.h [new file with mode: 0644]
mtk/include/parabolicpath.h [new file with mode: 0644]
mtk/include/pngloader.h [new file with mode: 0644]
mtk/include/region.h [new file with mode: 0644]
mtk/include/regionpath.h [new file with mode: 0644]
mtk/include/regionpathgroup.h [new file with mode: 0644]
mtk/include/screen.h [new file with mode: 0644]
mtk/include/selcontainer.h [new file with mode: 0644]
mtk/include/selcontainergroup.h [new file with mode: 0644]
mtk/include/separator.h [new file with mode: 0644]
mtk/include/timer.h [new file with mode: 0644]
mtk/include/widget.h [new file with mode: 0644]
mtk/include/window.h [new file with mode: 0644]
mtk/sample/CMakeLists.txt [new file with mode: 0644]
mtk/sample/environmentsdl.cpp [new file with mode: 0644]
mtk/sample/environmentsdl.h [new file with mode: 0644]
mtk/sample/languageapp.cpp [new file with mode: 0644]
mtk/sample/languageapp.h [new file with mode: 0644]
mtk/sample/main.cpp [new file with mode: 0644]
mtk/sample/menuapp.cpp [new file with mode: 0644]
mtk/sample/menuapp.h [new file with mode: 0644]
mtk/sample/regionpurefb.cpp [new file with mode: 0644]
mtk/sample/regionpurefb.h [new file with mode: 0644]
mtk/sample/resources/ARPHICPL.TXT [new file with mode: 0644]
mtk/sample/resources/FreeSans.ttf [new file with mode: 0644]
mtk/sample/resources/LICENSE [new file with mode: 0644]
mtk/sample/resources/applications.png [new file with mode: 0644]
mtk/sample/resources/configure.png [new file with mode: 0644]
mtk/sample/resources/film.png [new file with mode: 0644]
mtk/sample/resources/gkai00mp.ttf [new file with mode: 0644]
mtk/sample/resources/locale-src/compile.sh [new file with mode: 0755]
mtk/sample/resources/locale-src/fr.po [new file with mode: 0644]
mtk/sample/resources/locale-src/init.sh [new file with mode: 0755]
mtk/sample/resources/locale-src/make-pot.sh [new file with mode: 0755]
mtk/sample/resources/locale-src/update.sh [new file with mode: 0755]
mtk/sample/resources/locale-src/zh.po [new file with mode: 0644]
mtk/sample/resources/magnify.png [new file with mode: 0644]
mtk/sample/resources/system-help.png [new file with mode: 0644]
mtk/sample/resources/television.png [new file with mode: 0644]
mtk/sample/sampleappfactory.cpp [new file with mode: 0644]
mtk/sample/sampleappfactory.h [new file with mode: 0644]
mtk/sample/screenpurefb.cpp [new file with mode: 0644]
mtk/sample/screenpurefb.h [new file with mode: 0644]
mtk/sample/timersdl.cpp [new file with mode: 0644]
mtk/sample/timersdl.h [new file with mode: 0644]
mtk/src/CMakeLists.txt [new file with mode: 0644]
mtk/src/application.cpp [new file with mode: 0644]
mtk/src/colormodel.cpp [new file with mode: 0644]
mtk/src/colorschema.cpp [new file with mode: 0644]
mtk/src/combo.cpp [new file with mode: 0644]
mtk/src/container.cpp [new file with mode: 0644]
mtk/src/dc.cpp [new file with mode: 0644]
mtk/src/environment.cpp [new file with mode: 0644]
mtk/src/eventcallback.cpp [new file with mode: 0644]
mtk/src/events.cpp [new file with mode: 0644]
mtk/src/focus.cpp [new file with mode: 0644]
mtk/src/focusable.cpp [new file with mode: 0644]
mtk/src/fontrenderer.cpp [new file with mode: 0644]
mtk/src/fontschema.cpp [new file with mode: 0644]
mtk/src/icon.cpp [new file with mode: 0644]
mtk/src/iconregistry.cpp [new file with mode: 0644]
mtk/src/label.cpp [new file with mode: 0644]
mtk/src/linearcontainer.cpp [new file with mode: 0644]
mtk/src/padder.cpp [new file with mode: 0644]
mtk/src/parabolicpath.cpp [new file with mode: 0644]
mtk/src/pngloader.cpp [new file with mode: 0644]
mtk/src/region.cpp [new file with mode: 0644]
mtk/src/regionpathgroup.cpp [new file with mode: 0644]
mtk/src/screen.cpp [new file with mode: 0644]
mtk/src/selcontainer.cpp [new file with mode: 0644]
mtk/src/selcontainergroup.cpp [new file with mode: 0644]
mtk/src/separator.cpp [new file with mode: 0644]
mtk/src/widget.cpp [new file with mode: 0644]
mtk/src/window.cpp [new file with mode: 0644]
mtk/update-includes.sh [new file with mode: 0755]
presenter/LICENSE [new file with mode: 0644]
presenter/README [new file with mode: 0644]
presenter/firmware/Makefile [new file with mode: 0644]
presenter/firmware/crt0.S [new file with mode: 0644]
presenter/firmware/linker.ld [new file with mode: 0644]
presenter/firmware/main.c [new file with mode: 0644]
presenter/firmware/vga.c [new file with mode: 0644]
presenter/firmware/vga.h [new file with mode: 0644]
presenter/makeraw/CMakeLists.txt [new file with mode: 0644]
presenter/makeraw/FindGD.cmake [new file with mode: 0644]
presenter/makeraw/makeraw.c [new file with mode: 0644]
projectm/CMakeLists.txt [new file with mode: 0644]
projectm/FindAlsa.cmake [new file with mode: 0644]
projectm/LICENSE [new file with mode: 0644]
projectm/PCM.c [new file with mode: 0644]
projectm/PCM.h [new file with mode: 0644]
projectm/beat_detect.c [new file with mode: 0644]
projectm/beat_detect.h [new file with mode: 0644]
projectm/build/CMakeCache.txt [new file with mode: 0644]
projectm/build/CMakeFiles/CMakeCCompiler.cmake [new file with mode: 0644]
projectm/build/CMakeFiles/CMakeCXXCompiler.cmake [new file with mode: 0644]
projectm/build/CMakeFiles/CMakeDetermineCompilerABI_C.bin [new file with mode: 0755]
projectm/build/CMakeFiles/CMakeDetermineCompilerABI_CXX.bin [new file with mode: 0755]
projectm/build/CMakeFiles/CMakeDirectoryInformation.cmake [new file with mode: 0644]
projectm/build/CMakeFiles/CMakeError.log [new file with mode: 0644]
projectm/build/CMakeFiles/CMakeOutput.log [new file with mode: 0644]
projectm/build/CMakeFiles/CMakeSystem.cmake [new file with mode: 0644]
projectm/build/CMakeFiles/CompilerIdC/CMakeCCompilerId.c [new file with mode: 0644]
projectm/build/CMakeFiles/CompilerIdC/a.out [new file with mode: 0755]
projectm/build/CMakeFiles/CompilerIdCXX/CMakeCXXCompilerId.cpp [new file with mode: 0644]
projectm/build/CMakeFiles/CompilerIdCXX/a.out [new file with mode: 0755]
projectm/build/CMakeFiles/Makefile.cmake [new file with mode: 0644]
projectm/build/CMakeFiles/Makefile2 [new file with mode: 0644]
projectm/build/CMakeFiles/cmake.check_cache [new file with mode: 0644]
projectm/build/CMakeFiles/progress.make [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/C.includecache [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/DependInfo.cmake [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/PCM.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/beat_detect.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/build.make [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/builtin_funcs.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/cmake_clean.cmake [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/custom_shape.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/custom_wave.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/depend.internal [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/depend.make [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/eval.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/fftsg.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/flags.make [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/func.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/init_cond.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/link.txt [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/main.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/param.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/parser.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/pbuffer.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/per_frame_eqn.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/per_pixel_eqn.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/preset.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/progress.make [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/projectM.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/splaytree.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/timer.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/tree_types.c.o [new file with mode: 0644]
projectm/build/CMakeFiles/projectM.dir/wipemalloc.c.o [new file with mode: 0644]
projectm/build/Makefile [new file with mode: 0644]
projectm/build/cmake_install.cmake [new file with mode: 0644]
projectm/build/projectM [new file with mode: 0755]
projectm/build/test.milk [new file with mode: 0644]
projectm/builtin_funcs.c [new file with mode: 0644]
projectm/builtin_funcs.h [new file with mode: 0644]
projectm/common.h [new file with mode: 0644]
projectm/compare.h [new file with mode: 0644]
projectm/custom_shape.c [new file with mode: 0644]
projectm/custom_shape.h [new file with mode: 0644]
projectm/custom_shape_types.h [new file with mode: 0644]
projectm/custom_wave.c [new file with mode: 0644]
projectm/custom_wave.h [new file with mode: 0644]
projectm/custom_wave_types.h [new file with mode: 0644]
projectm/eval.c [new file with mode: 0644]
projectm/eval.h [new file with mode: 0644]
projectm/event.h [new file with mode: 0644]
projectm/expr_types.h [new file with mode: 0644]
projectm/fatal.h [new file with mode: 0644]
projectm/fftsg.c [new file with mode: 0644]
projectm/fftsg.h [new file with mode: 0644]
projectm/func.c [new file with mode: 0644]
projectm/func.h [new file with mode: 0644]
projectm/func_types.h [new file with mode: 0644]
projectm/idle_preset.h [new file with mode: 0644]
projectm/init_cond.c [new file with mode: 0644]
projectm/init_cond.h [new file with mode: 0644]
projectm/init_cond_types.h [new file with mode: 0644]
projectm/interface_types.h [new file with mode: 0644]
projectm/main.c [new file with mode: 0644]
projectm/param.c [new file with mode: 0644]
projectm/param.h [new file with mode: 0644]
projectm/param_types.h [new file with mode: 0644]
projectm/parser.c [new file with mode: 0644]
projectm/parser.h [new file with mode: 0644]
projectm/pbuffer.c [new file with mode: 0644]
projectm/pbuffer.h [new file with mode: 0644]
projectm/per_frame_eqn.c [new file with mode: 0644]
projectm/per_frame_eqn.h [new file with mode: 0644]
projectm/per_frame_eqn_types.h [new file with mode: 0644]
projectm/per_pixel_eqn.c [new file with mode: 0644]
projectm/per_pixel_eqn.h [new file with mode: 0644]
projectm/per_pixel_eqn_types.h [new file with mode: 0644]
projectm/per_point_types.h [new file with mode: 0644]
projectm/preset.c [new file with mode: 0644]
projectm/preset.h [new file with mode: 0644]
projectm/preset_types.h [new file with mode: 0644]
projectm/projectM.c [new file with mode: 0644]
projectm/projectM.h [new file with mode: 0644]
projectm/splaytree.c [new file with mode: 0644]
projectm/splaytree.h [new file with mode: 0644]
projectm/splaytree_types.h [new file with mode: 0644]
projectm/timer.c [new file with mode: 0644]
projectm/timer.h [new file with mode: 0644]
projectm/tree_types.c [new file with mode: 0644]
projectm/tree_types.h [new file with mode: 0644]
projectm/wipemalloc.c [new file with mode: 0644]
projectm/wipemalloc.h [new file with mode: 0644]

diff --git a/README b/README
new file mode 100644 (file)
index 0000000..830ceed
--- /dev/null
+++ b/README
@@ -0,0 +1,18 @@
+[> Milkymist(tm) Visual Synthesizer
+--------------------------------------
+
+This is the complete (source) snapshot of the Milkymist(tm) development repository.
+Milkymist is an opensource VJing system-on-chip for FPGA boards,
+compatible with MilkDrop presets.
+
+For the latest releases, binary distributions and more:
+  http://www.milkymist.org
+
+[> Subdirectories
+ /milkymist-core/       SoC design and demo firmware. Where you probably want to go.
+ /ml401-flasher/        JTAG Flasher tool for the Xilinx ML401 development board.
+ /mtk/                  C++ embedded GUI toolkit. Will be integrated in the Milkymist
+                         firmware in the future.
+ /presenter/            Slide-show sample application.
+ /projectm/             Stand-alone software preset renderer based on projectM.
+                         For understanding how MilkDrop works and "rapid prototyping".
diff --git a/build_binkit_ml401.sh b/build_binkit_ml401.sh
new file mode 100755 (executable)
index 0000000..380011f
--- /dev/null
@@ -0,0 +1,81 @@
+#!/bin/bash
+
+set -e
+
+# Set the board variable
+# for the build scripts in milkymist-core
+BOARD=xilinx-ml401
+
+unset LANG
+unset LOCALE
+
+# Build all we need
+cd milkymist-core
+./build_bitstream.sh
+./build_bios.sh
+./build_demo.sh
+cd ..
+
+echo "======================================="
+echo "Building flash tools"
+echo "======================================="
+echo ""
+cd ml401-flasher
+echo -n "Bitstream..."
+cd board
+make > /dev/null 2>&1
+cd ..
+echo "OK"
+echo -n "Host-side tool..."
+cd host
+make > /dev/null 2>&1
+cd ../..
+echo "OK"
+
+echo "======================================="
+echo "Packing binaries"
+echo "======================================="
+echo ""
+
+# Pack everything
+echo -n "Preparing files..."
+rm -rf binkit
+mkdir binkit
+
+cp milkymist-core/boards/xilinx-ml401/synthesis/build/system.bit binkit/
+cp milkymist-core/synthesis.log binkit/
+
+mkdir binkit/flash
+cp ml401-flasher/board/flasher.bit binkit/flash/
+cp ml401-flasher/host/flasher binkit/flash/
+cp milkymist-core/software/bios/bios.bin binkit/flash/
+
+cp milkymist-core/tools/flterm binkit/
+
+mkdir binkit/demo
+cp milkymist-core/software/demo/boot.bin binkit/demo/
+cp milkymist-core/splash/splash.raw binkit/demo/
+cp milkymist-core/presets/*.milk binkit/demo/
+
+cp milkymist-core/LICENSE binkit/
+cat << EOF > binkit/README
+This is a binary distribution of Milkymist(tm), an open hardware
+FPGA-based videosynth platform.
+
+Built for the Xilinx ML401 development board.
+
+You can find source and more information at :
+  http://www.milkymist.org
+EOF
+
+date > binkit/TIMESTAMP
+echo "OK"
+
+# Make a tarball
+echo -n "Generating tarball..."
+rm -f binkit-ml401.tar.bz2
+tar cjf binkit-ml401.tar.bz2 binkit
+echo "OK"
+
+echo ""
+echo "All done !"
diff --git a/clean_binkit.sh b/clean_binkit.sh
new file mode 100755 (executable)
index 0000000..705fcac
--- /dev/null
@@ -0,0 +1,16 @@
+#!/bin/bash
+
+set -e
+
+cd milkymist-core
+./clean_all.sh
+cd ..
+cd ml401-flasher
+cd board
+make clean
+cd ..
+cd host
+make clean
+cd ../..
+rm -rf binkit
+rm -f binkit-ml401.tar.bz2
diff --git a/milkymist-core/LICENSE b/milkymist-core/LICENSE
new file mode 100644 (file)
index 0000000..004a1a5
--- /dev/null
@@ -0,0 +1,506 @@
+                   EXCEPTION GENERAL PUBLIC LICENSE
+                      Version 2, January 2009
+                       DRAFT 7 - FOR FEEDBACK AND COMMENTS
+ Copyright (C) 2009 Exception License Foundation
+
+Everybody is allowed to copy and distribute verbatim copies of this license
+document, but modifying it in any way is not allowed.
+
+                           Preamble
+
+Licenses for most software and projects used to take away your freedom to
+share and change them, until the "free" licenses were created. That enabled an 
+enormous quantity of free software and open projects to be created, developed, 
+maintained and expanded way beyond what one could have imagined in the 
+beginning. Internet and the contemporary world would not be what it is without 
+the contribution of so many people participating in the "Free, Libre and Open 
+Source" movement (FLOSS) as some have described it.
+
+The original goal of FLOSS is a success, and now using and developing Open
+Source projects is a mark of smart thinking. In a perfect world, that would be
+a great common goal to use and change software freely, and collaborate in
+order to make the world more open and more diverse. In a perfect world, you
+wouldn't need an Exception License. We hope that this Exception License will
+be a sufficient message so that no further abuse are done, and be used more as
+an "art project example" or "theoretical or philosophical tool" for critical
+study of Open Source than a real license used in the real world. Sadly, we
+don't live in a perfect world and some uses are seen by the original Open
+Source Developers as abuses of their Open Source projects.
+
+Some military equipment are naturally using Open Source, for some weapon 
+systems on ships and airplanes. Some missile may actually be running Linux. 
+Some open source database may be used to track population for ethnic 
+cleansing. Also, on a less dramatic but even more real note, some of the 
+people using Open Source are actually working to make it impossible to develop 
+through DRM, software patents, lobbying or Internet censorship.
+
+Using Free, Libre and Open Source Software for some socially negative 
+activities can be seen as an unfair use of a tool for openness and justice. 
+The social cost of these negative activities is not covered by the people 
+committing such negative actions. Worse, Open Source software used for such 
+negative goals is indeed helping such negative projects, often against the own 
+will of the project developers, creators, maintainers and of the whole 
+community. The eGPL can be seen as a way to redistribute the social and human 
+cost of negative actions back to the original perpetrators of such negative  
+actions.
+
+The goal of this license is then to enable the Open Source developers to 
+choose that their project be covered by an Open Source license, and yet retain 
+the right to exclude some entities from the right of using or modifying this 
+software under this license. In such case, the concerned entities should 
+request another licensing scheme from these Open Source developers in order to 
+use the software. The project team can define groups of Exceptions for its 
+project, and can even subscribe to "feeds" of exceptions that will define in 
+time the group of entities that cannot use the project under eGPL. These feeds 
+can be written by Non-Governmental Organization who know which entities have a 
+detrimental social and human impact. By having such list written, that can 
+help reducing the number of entities with detrimental effect on people and 
+societies, giving them strong incentives to cease negative actions.
+
+Of course, the eGPL itself could be used as a tool in order to exclude 
+entities that do not have any negative impact. As a result, a few restrictions 
+apply to the eGPL. For example, you cannot define Exceptions on a specific 
+person or on an ethnic group. You can however define an Exception for a 
+Country or a Geographic region. Another condition is that the eGPL itself is 
+place under eGPL, creating the first recursive license known to us. The 
+Exception License Foundation will then pay attention to the use of the License 
+and revoke the right of using such license for a given project when abuse of 
+the original intent of the eGPL would be witnessed. For example, one could not 
+agree with an Exception that would prevent "All peace organizations of the 
+world" to use one particular Open Source project.
+
+We protect your rights with three steps: (1) copyright the project or 
+software, (2) propose this license which gives legal permission to copy, 
+distribute and/or modify the software or project, (3) enable you to define for 
+your own project the list of exceptions, that is of entities that cannot use 
+this license and should seek another license for this project.
+
+As with any Open Source license, there is no warranty for this free software. 
+If the software is modified by anyone else and then shared, the recipients 
+have to be aware that what they have is not the genuine, original software, so 
+that any issue due to someone else should not affect the original authors' 
+reputation. Also, people modifying the original project must be aware that 
+they cannot introduce new Exceptions, and that their Exception list is Exactly 
+the same as the original project. The reason behind this is that it would be 
+otherwise very easy for someone to take a project and slightly modify it, 
+create a new project, and then remove all the Exceptions from the new project, 
+therefore breaking the original authors intent.
+
+Finally, as with traditional Open Source License, we state again the obvious 
+that all patents affecting a project or software must be licensed for 
+everyone's free use or not licensed at all.
+
+The precise terms and conditions for using, copying, distributing and 
+modifying follow:
+
+
+                   EXCEPTION GENERAL PUBLIC LICENSE
+    TERMS AND CONDITIONS FOR USING, COPYING, DISTRIBUTING AND MODIFYING
+
+0. This License applies to any project, program, software or other work which 
+contains a notice placed by the copyright holder stating it may be used or 
+distributed under the terms of this Exception General Public License. The 
+"Project" below refers to any such project, program, software or work, and a 
+"work based on the Project" means either the Project or any derivative work 
+under copyright law: that is to say, a work containing the Project or a 
+portion of it, either verbatim or with modifications and/or translated into 
+another language. (Hereinafter, translation is included without any limitation 
+in the word "modification".)  Each licensee is addressed as "you".
+
+Activities other than using, copying, distributing and modifying are not 
+covered by this License; they are outside its scope.  The act of running the 
+project is restricted by the terms of this License (referred as "using"), and 
+the output from the Project is covered only if it can be considered as "a work 
+based on the Project" (independently from having been produced by running the 
+Project). Whether that applies to this current Project depends on what the 
+Project does.
+
+1. You may copy and distribute non-modified copies of the Project's source 
+code as you received it, in any medium, provided that you publish on each copy 
+an appropriate and visible copyright notice and disclaimer of warranty; do not 
+modify and preserve all the notices that refer to this License and to the 
+absence of any warranty; and give any other recipients of the Project a copy 
+of this License along with the Project, provided such recipients are not 
+Excepted from the use of such Project.
+
+You may charge a fee for the physical act of providing a copy, and you may at 
+your discretion offer warranty protection in exchange for a fee.
+
+2. You may modify your copy or copies of the Project or any part of it, thus 
+creating a work based on the Project, and copy and distribute such 
+modifications or work under the terms of Section 1 above, provided that you 
+also meet all of these following conditions:
+
+a) You must change the modified files to carry visible and prominent notices 
+stating that you modified the files and the date of any such modification.
+
+b) You must license any work that you distribute or publish, that in whole or 
+in part contains or is derived from the Project or any parts thereof, under 
+the terms of this License, at no charge to all third parties covered by this 
+License and not Excepted from its use.
+
+c) If the modified program normally has an interactive mode when run, you must
+make it, when started in the most ordinary way, to display or print a notice
+including an appropriate copyright statement and a notice that there is no
+warranty (or else, saying that you provide a warranty yourself) and that users
+may redistribute the Project under these same conditions, and telling the user
+how to visualize a copy of this License. If the original Project itself is
+interactive but does not normally display such an announcement, your work
+based on the Project is not required to display an announcement. If printing
+such an announcement would make another program non-interoperable with your
+own program and that the goal of your modification is to enable
+interoperability, your work based on the Project is not required to display an
+announcement.
+
+d) You must make sure that the Exceptions of this License do not cover any 
+entities or part of entities that may have modified this Project, or used this 
+program against the terms of this License for any activity related to the 
+modification of this Project.
+
+The requirements apply to the modified work in its entirety, not to parts of 
+it. If identifiable parts of that work are not derived from the Project, and 
+can be reasonably distinguished from your modified work, and as such 
+considered independent and separate works in themselves, then this License 
+does not apply to those parts when you distribute them as separate works.
+But when you distribute these same parts as part of a whole which is a work 
+based on the Project, the distribution of the whole must be under this 
+License, whose permissions, obligations and terms for other licensees extend 
+to the entire whole and to each and every part of it regardless of who wrote 
+it.
+
+Thus, it is not the goal of this section to claim rights or contest your 
+rights to work written entirely by you; rather, the goal is to exercise the 
+right to control the distribution of derivative or collective works based on 
+the Project, and make sure that you distribute parts not covered by this 
+License separately from the modified work.
+
+In addition, mere aggregation of another work not based on the Project with 
+the Project (or with a work based on the Project) on a storage space or 
+distribution medium does not put the other work under the scope of this 
+License.
+
+3. You may distribute and copy the Project (or a derivative work, under 
+section 2) in binary code or executable form under the conditions of Sections 
+1 and 2 printed above provided that you are not listed as part or whole of the 
+entities Excepted from its right of use and also do one of the following:
+
+a) Join the whole corresponding machine-readable source code, distributed also 
+under the terms of Section 1 and 2 printed above on a medium usually used for 
+software source-code exchange; or,
+
+b) Join a written offer, valid for at least three years, to give any third
+party at no more price than the cost of performing the physical act of source
+distribution, the corresponding machine-readable copy of the source code, to
+be distributed under the terms of Sections 1 and 2 printed above on a medium
+usually used for software source-code exchange; or,
+
+c) Join the information you received as to the offer to distribute
+corresponding source code. (This option is only allowed for non-commercial
+distribution and only if you obtained the Project in binary or executable form
+with such offer, in accord with Subsection b printed above.)
+
+The source code for a work means the readable text-based form of the work
+which is preferred for making modifications to it. For an executable work,
+complete source code means all the source code for all parts it contains, plus
+any interface definition files, plus the scripts and text rules used to
+control compilation and deployment of the executable. However, as a special
+exception, the distributed source code does not need to include anything that
+is normally distributed (in either binary or source code form) with the major
+components (kernel, standard libraries, compiler) of the operating system on
+which the executable Project runs, unless that component itself accompanies
+the executable. The Project must include any component that is not generally
+available and required for compilation, especially if the given component is
+otherwise only available under NDA (Non Disclosure Agreement) or any other
+restrictive license, and has to be included without any other restriction than
+this License.
+
+If distribution of binary code or executable is made by offering access to
+copy from a given place, then offering equivalent access to obtain the source
+code from the same place counts as distributing the source code and has to
+comply to the same rules, even though third parties are not compelled to copy
+the source code along with the binary code.
+
+4. You may not modify, copy, use, sublicense or distribute the Project except
+as expressly provided under this License. Any attempt otherwise to modify,
+copy, use, sublicense or distribute the Project is void, and will
+automatically terminate your rights under this License. However, parties who
+have received rights or copies from you under this License will not have their
+licenses terminated as long as these parties remain in full compliance with
+this License.
+
+5. You are not required to accept this License, since you did not sign it.
+However, nothing else grants you permission to use, modify, copy or distribute
+the Project or its derivative works. These actions are prohibited by law if
+you do not accept this License and expose you to legal actions. Therefore, by
+using, modifying or distributing the Project (or any derivative work based on
+the Program), you indicate your acceptance of this License to do so, and all
+its terms and conditions, without any restriction, for using, copying,
+distributing or modifying the Project or derivative works based on it.
+
+6. Each time you copy or redistribute the Project (or any derivative work
+based on the Project), the recipient automatically receives a license, this
+License, from the original licensor to distribute, copy, use or modify the
+Project subject to these terms and conditions. You may not impose any further
+restrictions on the recipients' exercise of the rights granted herein and in
+the Exceptions of this License as governed by its terms and conditions
+presented herein. You are not responsible for enforcing compliance by third
+parties to this License.
+
+7. If, as a consequence of a court judgment, justice decision, administrative
+decision or allegation of patent infringement or for any other reason (not
+limited to patent or legal issues), conditions are imposed on you or any
+entity you're part of (whether by agreement, court order or otherwise) that
+contradict the conditions of this License, they do not excuse you from the
+conditions or terms of this License. If you cannot use or distribute so as to
+satisfy both and simultaneously your obligations under this License and any
+other obligations, then as a direct consequence you may not distribute, modify
+or use the Project at all. For example, if a patent license would not permit
+royalty-free sharing, copy or redistribution of the Project by anybody who
+receive copies directly or indirectly through you, then the only manner you
+could satisfy both the patent license and this License would be to refrain
+entirely from distributing the Project.
+
+If any article or part of the License is held invalid or unenforceable under
+any particular circumstance or decision, by any authority within a country,
+company or any territorial or organizational entity, for everybody within that
+said country, company or any territorial or organizational entity, then the
+License does not apply anymore to anybody or any entity within the
+organizational or geographical zone or area of validity of the decision or of
+applicability of the circumstance. When the License does not apply, that means
+that any right of use, modification, copy, distribution is revoked for any
+person within the area of validity or applicability of the decision or of the
+circumstance, and thus prevents anyone with previous right under this License
+from using, modifying, sharing, copying or distributing the Project and any
+other project governed by this License. The spirit of this License is that if
+any court or organization or territorial power would disagree with the
+Exception List for example and hold it invalid and make a law precedent for a
+particular territory, administrative, then the Exception License Foundation
+cannot accept that the License be changed in its nature and thus would request
+all its users to seek for another compatible license from the Project
+developers and authors. If the license or any part of the License is held
+invalid or unenforceable for the Project only, within a country, company or
+any territorial or organizational entity, then the License does not authorize
+anybody within this entity to use the Project for the Project only.
+
+The purpose of this section is not to induce you to infringe any patents or to
+contest validity of any right claims or to infringe any property right claims;
+this section has the only purpose of protecting the integrity of the free,
+libre and open source distribution system, which is implemented by this public
+license practice. Many people have made generous contributions to the
+multitude of software distributed through that system thanks to the
+consistence application of that system; the author/donor has the decision
+power to decide if he or she is willing to distribute software through any
+other system and a licensee cannot impose that choice or overcome the terms
+and conditions of this License.
+
+This section is intended to make clear and well defined what is believed to be
+a consequence of the rest of this License.
+
+8. If the use and/or distribution of the Project is restricted in certain
+geographical zones or countries either by copyrighted interfaces or by
+patents, the original copyright holder who places the Project under this
+License may add a geographical use and/or distribution limitation excluding
+these countries, so that use and/or distribution is permitted only in or among
+countries not thus excluded. In such case, this License incorporates the
+limitation as if written in the body of this License. The recipient of the
+Project should make sure that these restrictions are up to date and accurate
+and do not apply to him, his country, the country where computers storing or
+executing the Project may be placed on or the entity he is part of.
+
+9. The Exception License Foundation may publish new versions and/or revised
+versions of the Exception General Public License at variable time intervals.
+Such new versions will be in similar spirit to the present version, but may
+differ in the text or details to address issues, problems or concerns as they
+occur. The Project can adopt a new version of the Exception General Public
+License or keep on using any earlier version.
+
+10. If you wish to use parts of the Project into other free projects whose
+distribution conditions are not governed by this Exception General Public
+License, write to the author to ask for permission.
+
+11. You can use, modify, copy and distribute the Project, provided any
+Exception does not prevent you to use the Project under this License.
+Exceptions are defined by the developers and makers of the Project. All the
+Exceptions are combined together to define the Exception List. Exceptions are
+defined as an exclusion of a certain list of given entities, be it companies,
+governmental components, countries or any organizational or territorial entity
+of any kind. Exceptions can be defined at the beginning of a Project and be
+changed during the whole evolution of the Project. If you can reasonably be
+included in any of the Exceptions for the Project, you are not allowed to use,
+modify, copy, share or distribute the Project under these License terms and
+conditions and should remove the Project from any storage medium you used. If
+you wish to use the Project but are Excepted from it, you should seek another
+alternative license from the Project authors and developers.
+
+12. Exceptions cannot apply to individual people. You cannot use the Project
+in any way that would benefit any of the entities listed in Exception, either
+directly or indirectly. Exceptions cannot apply to ethnic groups or genders.
+Such Exceptions, if defined are automatically said to be null and do not
+apply, whatever wording may be used by the Project, but the remainder of the
+Exception List applies in full force without being affected by any nullified
+Exception.
+
+13. Exceptions are defined either in fixed form as a file, usually named
+"EXCEPTIONS", hereby described as the Exception File, included in the Project
+or as a changeable list (that can be found online, on Internet, or requested
+from the Project developers and authors) and which location should be in the
+Exception File, included in the Project. Having an Exception File within the
+Project does not prevent the Project's authors to define other additional
+Exceptions online. The address of the online Exception List may or may not be
+listed within the Exception File. If no Exceptions File or alike is present
+within the Project, you must assume that all Exceptions are defined online and
+respect the License accordingly. You have to check both the Exception File and
+online in order to verify that this License applies to you. The default online
+server for defining Exceptions is the home web server of the Exception License
+usually located at http://www.eGPL.info. In case of not being able to access
+such server, you must use well known Internet tools and search engine to find
+the location of appropriate Exceptions for the Project.
+
+14. A Project is said to be a Forked Project when it is based on another
+Project and considered a derivative of this other Project. You may create a
+Forked project for any Project provided you're not excepted from this Project.
+The Forked project inherits all the Exceptions from the Parent Project. All
+the Exception requirements applies automatically to any Forked Project of the
+Forked Project, as a Forked Project at the second degree, third degree, or any
+degree, is also considered a Forked Project of the Parent Project. The Parent
+Project may declare at any time that Forked Project may add to the Exception
+List. Such indication is to be written in plain english in the Exception List
+of the Project. By default, any Forked Project cannot and should not add any
+Exception to the Exception List. If such statement allowing Forked Project to
+add Exceptions is present in the Parent Project, you may, as the modifier of a
+Project and thus the creator of a Forked Project, add more exceptions to the
+inherited Exceptions but cannot remove any Exception from the Parent Project
+Exception List. The Parent Project may require the Forked Project to remove
+any exception and you must comply with it. The Forked Project, by being a
+derivative, accepts any Exception removal request and recognize the right of
+the Parent Project to request such removal for the lifetime of the Parent
+Project. Not complying with a request from the Parent Project may lead to
+having the Forked Project listed in the Exception List, and as such, loose all
+rights of use of the original code, parts or sections of the Parent Project.
+In such case of a Forked Project being added to the Exception List of the
+Parent Project, you must delete all parts of the Parent Project from your
+Forked Project. Any Forked Project hereby accepts such requirement, present or
+future, and recognize the right of the Parent Project to request at any time
+that no change to the Exception List be done by any Forked Project.
+
+15. The License is itself a project placed under eGPL License. As such, the 
+Exception License Foundation can define Exceptions for the application of this 
+License. This is said to create the first recursive License where the License 
+apply on itself.
+
+16. When an entity is not granted rights on the Project because of an
+Exception, such entity is called an "Excepted Entity" should seek another
+license (hereby called an "Alternative license") to be granted to it before
+using or redistributing the Project. If you are part of an Excepted Entity,
+you can seek such Alternative license from the Project developers and authors.
+This process is called Resolution. Some hints about who or which online
+resource to contact in order to perform this Resolution can be noted in the
+"EXCEPTIONS" file and you should refer to it when seeking an Alternative
+license. You understand that if you cannot use the Project under this license
+(due to one or several Exceptions), and did not obtain any other License for
+the Project, then you have no right at all to use, modify, copy, share or
+redistribute the Project and should thus remove this Project from any medium,
+support or location that you may have under your command or used to
+temporarily store this Project.
+
+17. This License is automatically converted to Free Software Foundation GNU
+General Public License (GNU GPL) version 2 (two) after 10 (ten) years of no
+activity, no new release or no update on the Exception List of the Project.
+After such period, the GNU GPL is the only license governing the Project. This
+condition applies to the whole Project and does not take in account a
+particular version, release or package of the Project. Any bug fix, new
+version is considered as activity and therefore pushes back the conversion
+date by the duration mentioned above. Any activity in a Forked Project is also
+considered as activity on the Parent Project and therefore affects the
+conversion date as if the activity was in the Parent Project itself.
+
+                           NO WARRANTY
+
+18. BECAUSE THE PROGRAM IS LICENSED FREE OF CHARGE BY THIS LICENSE, THERE IS
+NO WARRANTY FOR THE PROJECT, TO THE EXTENT PERMITTED BY APPLICABLE LAW. EXCEPT
+WHEN OTHERWISE STATE IN WRITING THE COPYRIGHT HOLDERS AND/OR ANY OTHER PARTIES
+PROVIDE THE PROJECT "AS IS" WITHOUT ANY WARRANT OF ANY KIND, EITHER IMPLIED OR
+EXPRESSED, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. THE ENTIRE RISK AS THE
+PERFORMANCE AND QUALITY AND OF THE PROJECT IS WITH YOU. SHOULD THE PROJECT
+PROVE DEFECTIVE, YOU ASSUME THE COST OF ALL NECESSARY CORRECTION, REPAIR OR
+SERVICING. SHOULD THE PROJECT PROVE DANGEROUS, YOU HAVE TO NOTIFY THE ORIGINAL
+AUTHORS AND ANY PERSON THAT MAY HAVE USED OR RECEIVED A COPY THROUGH YOU.
+
+19. IN NO EVENT UNLESS REQUIRED BY APPLICABLE LAW OR AGREED TO IN WRITING WILL
+ANY COPYRIGHT HOLDER, OR ANY OTHER PARTY WHO MAY MODIFY AND/OR REDISTRIBUTE
+THE PROJECT AS PERMITTED ABOVE, BE LIABLE TO YOU FOR DAMAGES, INCLUDING ANY
+SPECIAL, GENERAL, INCIDENTAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THE USE
+OR INABILITY TO USE THE PROGRAM (INCLUDING BUT NOT LIMITED TO DATA BEING
+RENDERED INACCURATE OR LOSS OF DATA OR LOSSES SUSTAINED BY YOU OR THIRD
+PARTIES OR A FAILURE OF THE PROJECT TO OPERATE WITH ANY OTHER PROGRAMS), EVEN
+IF SUCH HOLDER OR OTHER PARTY HAS BEEN ADVISED OF THE POSSIBILITY OF SUCH
+PROBLEMS, ISSUES OR DAMAGES BY ANY FORM OF ORAL OR WRITTEN OR OTHER
+COMMUNICATION.
+
+                    END OF TERMS AND CONDITIONS
+
+
+           How to Apply These Terms to Your New Projects
+
+If you make a new project and you want it to be of the greatest possible use
+to the public while not helping entities having a social and human negative
+impact, then you can achieve this by making it free and excepted software
+which most people can redistribute and change under these terms.
+
+The eGPL license was designed to be very close to the spirit of other public
+license while allowing the Exception mechanism.
+
+To achieve that, attach the following notices to your project. It is best to
+attach them at the beginning of each source file to most effectively convey
+the exclusion of warranty; and each source file should have at least the
+"copyright" text and a pointer to where the full license is found.
+
+   <one line to give the program's name and a brief idea of what it does.>
+   Copyright (C) <year> <name of author>
+ This program is free and excepted software; you can use it, redistribute it
+ and/or modify it under the terms of the Exception General Public License as
+ published by the Exception License Foundation; either version 2 of the
+ License, or (at your option) any later version.
+ This program is distributed in the hope that it will be useful, but WITHOUT
+ ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ details.
+ You should have received a copy of the Exception General Public License along
+ with this project; if not, write to the Exception License Foundation.
+
+Also add details on how to contact you by electronic and paper mail.
+
+If the program has an interactive mode , make it print a short notice like
+this when it starts:
+
+ Zblahvision version 42, Copyright (C) year name of author 
+ Zblahvision comes with ABSOLUTELY NO WARRANTY; for details type `show w'.
+
+This is free and excepted software, and you are welcome to use it, modify it
+and/or redistribute it under certain conditions; type `show c' for details.
+
+The prototype commands `show w' and `show c' should show the appropriate parts
+of the Exception General Public License. Follow the same idea if your program
+has a graphical interface.
+
+You should also get your employer or your school, if any, to sign a "copyright
+disclaimer" for the project, if necessary. Here is a sample; alter the names:
+
+ Corpozealous, Inc., hereby disclaims all copyright interest in the program
+ `Zblahvision' (which identify true terror-making managers) written by Paul
+ Kludger.
+
+ <signature of Max Micromanage>, 1 April 2001 Max Micromanage, President of
+ Corporate Relationships
+
+This Exception General Public License does not permit incorporating your
+program into proprietary programs. If your program is a subroutine library,
+you may consider it more useful to permit linking proprietary applications
+with the library. If this is what you want to do, use the Exception Lesser
+General Public License instead of this License.
diff --git a/milkymist-core/LICENSE.GD b/milkymist-core/LICENSE.GD
new file mode 100644 (file)
index 0000000..5e17d03
--- /dev/null
@@ -0,0 +1,53 @@
+     Portions copyright 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001,
+     2002 by Cold Spring Harbor Laboratory. Funded under Grant
+     P41-RR02188 by the National Institutes of Health. 
+
+     Portions copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002 by
+     Boutell.Com, Inc. 
+
+     Portions relating to GD2 format copyright 1999, 2000, 2001, 2002
+     Philip Warner.
+     
+     Portions relating to PNG copyright 1999, 2000, 2001, 2002 Greg
+     Roelofs. 
+
+     Portions relating to gdttf.c copyright 1999, 2000, 2001, 2002 John  
+     Ellson (ellson@lucent.com).
+   
+     Portions relating to gdft.c copyright 2001, 2002 John Ellson  
+     (ellson@lucent.com).  
+
+     Portions copyright 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007
+                Pierre-Alain Joye (pierre@libgd.org).  
+
+     Portions relating to JPEG and to color quantization copyright 2000,
+     2001, 2002, Doug Becker and copyright (C) 1994, 1995, 1996, 1997,
+     1998, 1999, 2000, 2001, 2002, Thomas G. Lane. This software is
+     based in part on the work of the Independent JPEG Group. See the
+     file README-JPEG.TXT for more information.
+
+     Portions relating to WBMP copyright 2000, 2001, 2002 Maurice
+     Szmurlo and Johan Van den Brande.
+
+     Permission has been granted to copy, distribute and modify gd in
+     any context without fee, including a commercial application,
+     provided that this notice is present in user-accessible supporting
+     documentation.
+
+     This does not affect your ownership of the derived work itself, and 
+     the intent is to assure proper credit for the authors of gd, not to
+     interfere with your productive use of gd. If you have questions,
+     ask. "Derived works" includes all programs that utilize the   
+     library. Credit must be given in user-accessible documentation.
+
+     This software is provided "AS IS." The copyright holders disclaim  
+     all warranties, either express or implied, including but not
+     limited to implied warranties of merchantability and fitness for a
+     particular purpose, with respect to this code and accompanying  
+     documentation.
+
+     Although their code does not appear in gd, the authors wish to thank
+     David Koblas, David Rowley, and Hutchison Avenue Software Corporation
+     for their prior contributions.
+
diff --git a/milkymist-core/LICENSE.LATTICE b/milkymist-core/LICENSE.LATTICE
new file mode 100644 (file)
index 0000000..376f57b
--- /dev/null
@@ -0,0 +1,564 @@
+LATTICE SEMICONDUCTOR CORPORATION
+LatticeMico32 System License Agreement
+
+This is a legal agreement between you, the end user, and Lattice Semiconductor 
+Corporation.  By proceeding with the installation or use of the Software, you 
+agree to be bound by the terms of this Agreement.  If you do not agree to the 
+terms of this Agreement, do not use the Software, and promptly return the 
+media package and all accompanying items (including written materials and 
+binders or other containers) to the place you obtained them for a full refund 
+of any applicable license fees.
+
+Lattice Semiconductor Corporation ("Lattice") and the individual or entity 
+acquiring the Software ("Licensee") agree as follows:
+
+1.  DEFINITIONS
+"Software" means the LatticeMico32 System computer program(s) other than the 
+open source programs identified in Section 11 herein in machine-readable form 
+furnished to Licensee by Lattice, in whatever media and by whatever method, 
+which are enabled for use pursuant to Lattice's software protection mechanism, 
+and for which Licensee has paid any applicable license fees.  Software includes 
+any related update or upgrade programs that may be added from time to time.
+
+2.  SOFTWARE LICENSE
+a.  Lattice hereby grants to Licensee a non-exclusive, nontransferable license 
+to use the Software for Licensee's internal purposes only on any computer 
+possessed by Licensee on which the Software is designed to operate, such use 
+to be in accordance with and subject to the terms and conditions of this 
+Agreement.
+
+b.  Pursuant to this Agreement, Licensee may (i) physically transfer any 
+Software from one computer to another provided that the Software is used on 
+only one such computer at a time and (ii) use the Software and any output 
+files generated by the Software for the sole purpose of designing and 
+programming semiconductor components (the "Permitted Use") and (iii) make 
+one (1) copy of the Software for Licensee's own use solely for backup or 
+archive purposes.  Licensee may also merge the Software (or a portion thereof) 
+into any other software to form an updated work; provided that, upon 
+termination of Licensee's license, the Software shall be completely removed 
+from the updated work and treated as if permission to merge had never been 
+granted.  The use of any portion of the Software included in any such updated 
+work remains at all times subject to the terms and conditions of this Agreement.
+
+c.  Licensee shall include Lattice's (and Lattice's suppliers', as applicable) 
+copyrights, trademarks, and other proprietary notices on any copies and merged 
+versions of the Software.
+
+d.  Licensee shall not distribute, copy, transfer, lend, incorporate, modify, 
+or use the Software for any purpose except as expressly provided herein.
+
+e.  If Licensee fails to comply with the provisions of this Agreement, the 
+License is automatically terminated.
+
+f.  Except for the rights expressly granted herein to Licensee, the title and 
+all intellectual property rights in and to the Software and any copy of the 
+Software which may be made by Licensee hereunder remain the sole and exclusive 
+property of Lattice and/or Lattice's licensors.
+
+3.  LIMITED WARRANTY AND REMEDIES
+a.  Lattice warrants to Licensee that the media containing the Software will 
+be free from defects in materials and workmanship under normal use and service 
+for a period of ninety (90) days from the date of delivery.  Lattice further 
+warrants that the Software will substantially conform to Lattice's published 
+specifications for the Software at the time of delivery for a period of ninety 
+(90) days from the date of delivery. 
+
+b.  During the 90-day warranty period, (1) Lattice will replace any Software 
+not meeting the foregoing warranty that is returned to Lattice; or (2) if 
+Lattice is unable to deliver replacement Software which performs substantially 
+in accordance with current program documentation or Software on a media which 
+is free of defects in materials or workmanship, Licensee may terminate this 
+Agreement by returning the Software and any applicable license fee paid by 
+Licensee to Lattice will be refunded.  Any replacement Software or media will 
+be warranted for the remainder of the original warranty period or thirty (30) 
+days, whichever is longer.
+
+c.  Any products which are not returned to Lattice within the warranty period 
+or which have been subject to accident, abuse, misuse, alteration, neglect, or 
+unauthorized repair or installation are not covered by warranty.
+
+4.  WARRANTY DISCLAIMER
+EXCEPT FOR THE ABOVE EXPRESSED LIMITED WARRANTIES, LATTICE MAKES NO WARRANTIES 
+ON THE SOFTWARE, WHETHER EXPRESSED, IMPLIED, STATUTORY, OR IN ANY OTHER 
+PROVISION OF THIS AGREEMENT OR COMMUNICATION WITH LICENSEE, AND LATTICE 
+SPECIFICALLY DISCLAIMS ANY IMPLIED WARRANTY OF MERCHANTABILITY OR FITNESS 
+FOR A PARTICULAR PURPOSE.  LATTICE DOES NOT WARRANT THAT THE OPERATION OF 
+THE SOFTWARE BY LICENSEE WILL BE UNINTERRUPTED OR ERROR FREE.  LICENSEE 
+ASSUMES RESPONSIBILITY FOR SELECTION OF THE SOFTWARE TO ACHIEVE ITS INTENDED 
+RESULTS, AND FOR THE PROPER INSTALLATION, USE, AND RESULTS OBTAINED FROM THE 
+SOFTWARE.  EXCEPT FOR THE ABOVE EXPRESSED LIMITED WARRANTIES, LICENSEE ASSUMES 
+THE ENTIRE RISK OF THE SOFTWARE PROVING DEFECTIVE OR FAILING TO PERFORM 
+PROPERLY AND IN SUCH EVENT, LICENSEE SHALL ASSUME THE ENTIRE COST AND RISK 
+OF ANY REPAIR, SERVICE, CORRECTION, OR ANY OTHER LIABILITIES OR DAMAGES CAUSED 
+BY OR ASSOCIATED WITH THE SOFTWARE.  LATTICE'S SOLE LIABILITY, AND LICENSEE'S 
+SOLE REMEDY, IS SET FORTH ABOVE.
+
+5.  SOURCE CODE
+Licensee shall not attempt to reverse translate, decompile or otherwise 
+attempt to derive the source code of the Software.  In the event any source 
+code is explicitly licensed to Licensee as part of the Software, such 
+limitation will not apply to such source code.  Licensee shall not alter or 
+remove from the Software any copyright, trademark or other proprietary 
+notices of Lattice and/or Lattice's licensors.  Any use or attempted use of 
+the Software in violation of the foregoing restrictions is a breach of the 
+Agreement which will cause irreparable harm to Lattice, entitling Lattice to 
+injunctive relief in addition to all legal remedies.
+
+6.  LIMITATION OF LIABILITY
+a.  Licensee agrees that Lattice's entire liability to Licensee and Licensee's 
+sole remedy hereunder for any cause whatsoever, regardless of the form of the 
+action, shall be limited to the price paid to Lattice for the Software.
+
+b.  IN NO EVENT WILL LATTICE OR ANY OF ITS SUPPLIERS BE LIABLE TO LICENSEE 
+OR ANY OTHER PERSON FOR ANY DAMAGES, INCLUDING ANY DIRECT, INDIRECT, 
+INCIDENTAL, CONSEQUENTIAL, OR SPECIAL DAMAGES, INCLUDING EXPENSES, LOST 
+PROFITS, LOST SAVINGS, OR OTHER DAMAGES OF ANY SORT ARISING OUT OF THE USE 
+OF OR INABILITY TO USE THE SOFTWARE, EVEN IF LATTICE HAS BEEN ADVISED OF THE 
+POSSIBILITY OF SUCH DAMAGES.
+
+SOME STATES DO NOT ALLOW THE LIMITATION OR EXCLUSION OF INCIDENTAL OR 
+CONSEQUENTIAL DAMAGES, SO THE ABOVE LIMITATIONS OR EXCLUSIONS MAY NOT 
+APPLY TO YOU.
+
+7.  DEFAULT AND TERMINATION
+This Agreement will continue indefinitely, until and unless terminated; it 
+will terminate automatically in the event Licensee fails to perform any of 
+its obligations hereunder.  Licensee may terminate this Agreement at any time 
+by returning to Lattice the original and all copies of the Software or by 
+destroying the Software together with all copies thereof, including all 
+modifications and merged portions in any form.  Upon termination of this 
+Agreement for any reason, Licensee shall either return to Lattice the original 
+and all copies of the Software, or, upon Lattice's request, destroy such 
+original and copies and provide Lattice with written certification of their 
+destruction.
+
+8.  EXPORT CONTROL
+Licensee shall not export the Software or the direct product thereof without 
+first obtaining any necessary U.S. or other governmental licenses and 
+approvals.  In connection with such export control compliance, Licensee 
+certifies as follows:
+ - that Licensee is not on the Denied Persons List maintained by the U.S. 
+Bureau of Industry and Security;
+
+ - that Licensee is not on the list of Specially Designated Nationals and 
+Blocked Persons maintained by the U.S. Department of the Treasury;
+ - that Licensee is not a citizen or resident of, or an agent of, Cuba, Iran, 
+Iraq, North Korea, Libya, Sudan, or Syria, or any other country to which 
+export of the referenced Software is prohibited; and
+ - that Licensee is legally permitted, under all applicable export and 
+commerce control laws and regulations, to receive the referenced Software.
+
+9.  U.S. GOVERNMENT RESTRICTED RIGHTS
+The Software and any accompanying documentation are provided with RESTRICTED 
+RIGHTS.  Use, duplication, or disclosure by the Government is subject to 
+restrictions as set forth in subparagraph (c)(1)(ii) of The Rights in 
+Technical Data and Computer Software clause at DFARS 252.227-7013 or 
+subparagraphs (c)(1) and (2) of Commercial Computer Software--Restricted 
+Rights at 48 CFR 52.227-19, as applicable.  Contractor/manufacturer is Lattice 
+Semiconductor Corporation, 5555 NE Moore Court, Hillsboro, Oregon 97124 and 
+its licensors.
+
+10.  ADDITIONAL TERMS AND CONDITIONS APPLICABLE TO LATTICE PROGRAMMING HARDWARE
+Lattice programmers, ispDOWNLOAD® cables, and other hardware sold for use in 
+conjunction with Lattice software ("Programming Hardware") are designed and 
+intended for use solely with semiconductor components manufactured by Lattice 
+Semiconductor Corporation.  Programming Hardware is warranted to meet Lattice 
+Specifications only for a period of ninety (90) days; in all other respects 
+the terms and conditions of sale of Programming Hardware shall be Lattice's 
+standard terms and conditions set forth in Lattice's Sales Order 
+Acknowledgement.  Furthermore, Lattice Specifications for the ispDOWNLOAD 
+cable limit its use to low-volume engineering applications only, and not for 
+volume production use.  As with all other Programming Hardware, Lattice shall 
+not be liable for any use of the ispDOWNLOAD cable in production, or use of 
+worn or improperly installed hardware or use with incompatible systems or 
+components.
+
+11.  OPEN SOURCE SOFTWARE
+a.  Your use of the Software is governed by the terms of this Agreement.  
+However, certain separate source code modules identified in Section 11(b) 
+and Section 11(c) below that are installed with, but not integrated with, the 
+Software have been provided by third parties.  By proceeding with the 
+installation and use of such open source code, you are also agreeing to use 
+this code in accordance with the terms of the agreements under which such 
+code has been licensed.  
+
+b.  Certain open source code is licensed under the Eclipse Public License 
+v. 1.0, a copy of which is attached hereto as Appendix A.
+
+c.  Certain open source code is licensed pursuant to the terms of the notice 
+attached hereto as Appendix B.
+
+12.  OPEN SOURCE LICENSE AGREEMENT FOR OUTPUT FILES GENERATED BY THE 
+LATTICEMICO32 SYSTEM 
+By proceeding with the installation and use of the LatticeMico32 System, you 
+are agreeing to use the output files generated by it in accordance with the 
+terms of the Lattice Semiconductor Corporation Open Source License Agreement, 
+a copy of which is attached hereto as Appendix C.
+
+13.  INFORMATION REGARDING PERSONAL DATA
+If you downloaded this Software from our website, we have collected 
+information about you, including your name and contact information, from the 
+information you provided when you registered to use the website.
+
+If you acquired the Software from a source other than our website, we will ask 
+you for certain information, including your name and contact information, as 
+part of the installation procedure.
+
+Some of our Software comes bundled with software from third party providers, 
+including Mentor Graphics Corporation and Synplicity, Inc. If you obtain a 
+license key from us for such Software, we will provide your name, corporate 
+affiliation, address, phone number, fax number, and email address, along with 
+information about the software version you have chosen, to the appropriate 
+third party provider.
+
+14.  GENERAL
+THIS AGREEMENT WILL BE GOVERNED BY THE LAWS OF THE STATE OF OREGON, WITHOUT 
+REGARD TO ITS CONFLICT OF LAWS PROVISIONS.
+
+Licensee may not sublicense, assign, or transfer the License or the Software.
+
+The prevailing party in any legal action or arbitration arising out of this 
+Agreement shall be entitled to reimbursement for reasonable attorneys fees 
+and expenses, in addition to any other rights and remedies such party may have.
+
+This Agreement is the entire agreement between the parties and supersedes any 
+other communications or prior agreements, oral or written, regarding the 
+Software.  
+
+If any provision of this Agreement is held invalid, the remainder of the 
+Agreement shall continue in full force and effect.
+
+Please direct all inquiries, in writing, to Lattice Semiconductor Corporation, 
+5555 N.E. Moore Court, Hillsboro, Oregon 97124.
+©2006-2008 Lattice Semiconductor Corporation.  All rights reserved.
+
+
+Intellectual Property Notice
+
+The software governed by this License Agreement is:
+
+Copyright ©, 1992-2008, Lattice Semiconductor Corporation, All Rights Reserved
+
+
+
+APPENDIX A
+
+Eclipse Public License v 1.0
+
+THE ACCOMPANYING PROGRAM IS PROVIDED UNDER THE TERMS OF THIS ECLIPSE PUBLIC 
+LICENSE ("AGREEMENT"). ANY USE, REPRODUCTION OR DISTRIBUTION OF THE PROGRAM 
+CONSTITUTES RECIPIENT'S ACCEPTANCE OF THIS AGREEMENT.
+
+1. DEFINITIONS 
+
+"Contribution" means: 
+
+a) in the case of the initial Contributor, the initial code and documentation 
+distributed under this Agreement, and 
+
+b) in the case of each subsequent Contributor: i) changes to the Program, and 
+ii) additions to the Program; where such changes and/or additions to the 
+Program originate from and are distributed by that particular Contributor. 
+A Contribution 'originates' from a Contributor if it was added to the Program 
+by such Contributor itself or anyone acting on such Contributor's behalf. 
+Contributions do not include additions to the Program which: (i) are separate 
+modules of software distributed in conjunction with the Program under their 
+own license agreement, and (ii) are not derivative works of the Program. 
+
+"Contributor" means any person or entity that distributes the Program.
+
+"Licensed Patents" mean patent claims licensable by a Contributor which are 
+necessarily infringed by the use or sale of its Contribution alone or when 
+combined with the Program. 
+
+"Program" means the Contributions distributed in accordance with this 
+Agreement.
+
+"Recipient" means anyone who receives the Program under this Agreement, 
+including all Contributors. 
+
+2. GRANT OF RIGHTS 
+
+a) Subject to the terms of this Agreement, each Contributor hereby grants 
+Recipient a non-exclusive, worldwide, royalty-free copyright license to 
+reproduce, prepare derivative works of, publicly display, publicly perform, 
+distribute and sublicense the Contribution of such Contributor, if any, and 
+such derivative works, in source code and object code form.
+
+b) Subject to the terms of this Agreement, each Contributor hereby grants 
+Recipient a non-exclusive, worldwide, royalty-free patent license under 
+Licensed Patents to make, use, sell, offer to sell, import and otherwise 
+transfer the Contribution of such Contributor, if any, in source code and 
+object code form. This patent license shall apply to the combination of the 
+Contribution and the Program if, at the time the Contribution is added by the 
+Contributor, such addition of the Contribution causes such combination to be 
+covered by the Licensed Patents. The patent license shall not apply to any 
+other combinations which include the Contribution. No hardware per se is 
+licensed hereunder. 
+
+c) Recipient understands that although each Contributor grants the licenses 
+to its Contributions set forth herein, no assurances are provided by any 
+Contributor that the Program does not infringe the patent or other 
+intellectual property rights of any other entity. Each Contributor disclaims 
+any liability to Recipient for claims brought by any other entity based on 
+infringement of intellectual property rights or otherwise. As a condition to 
+exercising the rights and licenses granted hereunder, each Recipient hereby 
+assumes sole responsibility to secure any other intellectual property rights 
+needed, if any. For example, if a third party patent license is required to 
+allow Recipient to distribute the Program, it is Recipient's responsibility to 
+acquire that license before distributing the Program.
+
+d) Each Contributor represents that to its knowledge it has sufficient 
+copyright rights in its Contribution, if any, to grant the copyright license 
+set forth in this Agreement. 
+
+3. REQUIREMENTS 
+
+A Contributor may choose to distribute the Program in object code form under 
+its own license agreement, provided that: 
+a) it complies with the terms and conditions of this Agreement; and
+b) its license agreement:
+i) effectively disclaims on behalf of all Contributors all warranties and 
+conditions, express and implied, including warranties or conditions of title 
+and non-infringement, and implied warranties or conditions of merchantability 
+and fitness for a particular purpose; 
+ii) effectively excludes on behalf of all Contributors all liability for 
+damages, including direct, indirect, special, incidental and consequential 
+damages, such as lost profits; 
+iii) states that any provisions which differ from this Agreement are offered 
+by that Contributor alone and not by any other party; and
+iv) states that source code for the Program is available from such 
+Contributor, and informs licensees how to obtain it in a reasonable manner 
+on or through a medium customarily used for software exchange.
+When the Program is made available in source code form:
+a) it must be made available under this Agreement; and 
+b) a copy of this Agreement must be included with each copy of the Program. 
+Contributors may not remove or alter any copyright notices contained within 
+the Program. 
+Each Contributor must identify itself as the originator of its Contribution, 
+if any, in a manner that reasonably allows subsequent Recipients to identify 
+the originator of the Contribution. 
+
+4. COMMERCIAL DISTRIBUTION
+
+Commercial distributors of software may accept certain responsibilities with 
+respect to end users, business partners and the like. While this license is 
+intended to facilitate the commercial use of the Program, the Contributor 
+who includes the Program in a commercial product offering should do so in a 
+manner which does not create potential liability for other Contributors. 
+Therefore, if a Contributor includes the Program in a commercial product 
+offering, such Contributor ("Commercial Contributor") hereby agrees to defend 
+and indemnify every other Contributor ("Indemnified Contributor") against any 
+losses, damages and costs (collectively "Losses") arising from claims, 
+lawsuits and other legal actions brought by a third party against the 
+Indemnified Contributor to the extent caused by the acts or omissions of such 
+Commercial Contributor in connection with its distribution of the Program in a 
+commercial product offering. The obligations in this section do not apply to 
+any claims or Losses relating to any actual or alleged intellectual property 
+infringement. In order to qualify, an Indemnified Contributor must: a) 
+promptly notify the Commercial Contributor in writing of such claim, and b) 
+allow the Commercial Contributor to control, and cooperate with the Commercial 
+Contributor in, the defense and any related settlement negotiations. The 
+Indemnified Contributor may participate in any such claim at its own expense.
+
+For example, a Contributor might include the Program in a commercial product 
+offering, Product X. That Contributor is then a Commercial Contributor. If 
+that Commercial Contributor then makes performance claims, or offers 
+warranties related to Product X, those performance claims and warranties are 
+such Commercial Contributor's responsibility alone. Under this section, the 
+Commercial Contributor would have to defend claims against the other 
+Contributors related to those performance claims and warranties, and if a 
+court requires any other Contributor to pay any damages as a result, the 
+Commercial Contributor must pay those damages. 
+
+5. NO WARRANTY
+
+EXCEPT AS EXPRESSLY SET FORTH IN THIS AGREEMENT, THE PROGRAM IS PROVIDED ON 
+AN "AS IS" BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, EITHER EXPRESS 
+OR IMPLIED INCLUDING, WITHOUT LIMITATION, ANY WARRANTIES OR CONDITIONS OF 
+TITLE, NON-INFRINGEMENT, MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE. 
+
+Each Recipient is solely responsible for determining the appropriateness of 
+using and distributing the Program and assumes all risks associated with its 
+exercise of rights under this Agreement , including but not limited to the 
+risks and costs of program errors, compliance with applicable laws, damage to 
+or loss of data, programs or equipment, and unavailability or interruption of 
+operations. 
+
+6. DISCLAIMER OF LIABILITY
+
+EXCEPT AS EXPRESSLY SET FORTH IN THIS AGREEMENT, NEITHER RECIPIENT NOR ANY 
+CONTRIBUTORS SHALL HAVE ANY LIABILITY FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING WITHOUT LIMITATION 
+LOST PROFITS), HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 
+CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 
+ARISING IN ANY WAY OUT OF THE USE OR DISTRIBUTION OF THE PROGRAM OR THE 
+EXERCISE OF ANY RIGHTS GRANTED HEREUNDER, EVEN IF ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGES.
+
+7. GENERAL
+
+If any provision of this Agreement is invalid or unenforceable under 
+applicable law, it shall not affect the validity or enforceability of the 
+remainder of the terms of this Agreement, and without further action by the 
+parties hereto, such provision shall be reformed to the minimum extent 
+necessary to make such provision valid and enforceable.
+
+If Recipient institutes patent litigation against any entity (including a 
+cross-claim or counterclaim in a lawsuit) alleging that the Program itself 
+(excluding combinations of the Program with other software or hardware) 
+infringes such Recipient's patent(s), then such Recipient's rights granted 
+under Section 2(b) shall terminate as of the date such litigation is filed. 
+
+All Recipient's rights under this Agreement shall terminate if it fails to 
+comply with any of the material terms or conditions of this Agreement and 
+does not cure such failure in a reasonable period of time after becoming 
+aware of such noncompliance. If all Recipient's rights under this Agreement 
+terminate, Recipient agrees to cease use and distribution of the Program as 
+soon as reasonably practicable. However, Recipient's obligations under this 
+Agreement and any licenses granted by Recipient relating to the Program shall 
+continue and survive. 
+
+Everyone is permitted to copy and distribute copies of this Agreement, but in 
+order to avoid inconsistency the Agreement is copyrighted and may only be 
+modified in the following manner. The Agreement Steward reserves the right 
+to publish new versions (including revisions) of this Agreement from time to 
+time. No one other than the Agreement Steward has the right to modify this 
+Agreement. The Eclipse Foundation is the initial Agreement Steward. The 
+Eclipse Foundation may assign the responsibility to serve as the Agreement 
+Steward to a suitable separate entity. Each new version of the Agreement will 
+be given a distinguishing version number. The Program (including 
+Contributions) may always be distributed subject to the version of the 
+Agreement under which it was received. In addition, after a new version of the 
+Agreement is published, Contributor may elect to distribute the Program 
+(including its Contributions) under the new version. Except as expressly 
+stated in Sections 2(a) and 2(b) above, Recipient receives no rights or 
+licenses to the intellectual property of any Contributor under this Agreement, 
+whether expressly, by implication, estoppel or otherwise. All rights in the 
+Program not expressly granted under this Agreement are reserved.
+
+This Agreement is governed by the laws of the State of New York and the 
+intellectual property laws of the United States of America. No party to this 
+Agreement will bring a legal action under this Agreement more than one year 
+after the cause of action arose. Each party waives its rights to a jury trial 
+in any resulting litigation.
+
+APPENDIX B
+
+Copyright (C) 2001 Richard Herveille
+richard@asics.ws 
+
+This source file may be used and distributed without restriction provided that 
+this copyright statement is not removed from the file and that any derivative 
+work contains the original copyright notice and the associated disclaimer.
+
+THIS SOFTWARE IS PROVIDED "AS IS" AND WITHOUT ANY EXPRESS OR IMPLIED 
+WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF 
+MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE. IN NO EVENT SHALL 
+THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 
+SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED 
+TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR 
+PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF 
+LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING 
+NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, 
+EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 
+
+APPENDIX C
+
+LATTICE SEMICONDUCTOR CORPORATION OPEN SOURCE LICENSE AGREEMENT
+
+This is a legal agreement between You (Licensee, either a company or an 
+individual), and Lattice Semiconductor Corporation, the Provider (Licensor) 
+of the Software.  The Software subject to this Open Source License Agreement 
+is the output files generated by the Provider's LatticeMico32 System.  By 
+proceeding with the installation, modification, use or distribution in whole 
+or in part of Software that identifies itself as licensed under the Lattice 
+Semiconductor Corporation Open Source License Agreement, You agree to be 
+bound by the terms of this Agreement. If You do not agree to the terms of this 
+Agreement, You are not permitted to use, modify or distribute the Software.
+
+1. The Provider grants to You a personal, non-exclusive right to use and 
+distribute the source code of the Software provided that:
+ - You make distributions free of charge under these license terms
+ - You ensure that the original copyright notices and limitations of liability 
+and warranty sections remain intact.
+
+2. The Provider grants to You a personal, non-exclusive right to modify the 
+source code of the Software and incorporate it with other source code to 
+create a Derivative Work.  At Your discretion, You may distribute this 
+Derivative Work in a form and under terms of Your choosing provided:
+ - You arrange Your design such that the Derivative Work is an identifiable 
+module within Your overall design.
+ - You distribute the source code associated with the modules containing the 
+Derivative Work in a customarily accepted machine-readable format, free of 
+charge under a license agreement that contains these license terms. 
+ - You ensure that the original copyright notices and limitations of liability 
+and warranty sections remain intact.
+ - You clearly identify areas of the source code that You have modified.
+
+3. The Provider grants to You a personal, non-exclusive right to use object 
+code created from the Software or a Derivative Work to physically implement 
+the design in devices such as a programmable logic devices or application 
+specific integrated circuits.  You may distribute these devices without 
+accompanying them with a copy of this license or source code.
+
+4. This Software is provided free of charge.  IN NO EVENT WILL THE PROVIDER 
+OR ANY OF ITS SUPPLIERS BE LIABLE TO YOU OR ANY OTHER PERSON FOR ANY 
+DAMAGES, INCLUDING ANY DIRECT, INDIRECT, INCIDENTAL, CONSEQUENTIAL, OR 
+SPECIAL DAMAGES, WHETHER CHARACTERIZED AS EXPENSES, LOST PROFITS, LOST 
+SAVINGS, OR OTHER DAMAGES OF ANY SORT, ARISING OUT OF THE USE OF OR INABILITY 
+TO USE THE SOFTWARE, EVEN IF THE PROVIDER HAS BEEN ADVISED OF THE POSSIBILITY 
+OF SUCH DAMAGES.
+
+5. THE PROVIDER  MAKES NO WARRANTIES WITH RESPECT TO THE SOFTWARE, WHETHER 
+EXPRESSED, IMPLIED, STATUTORY, OR IN ANY OTHER PROVISION OF THIS AGREEMENT OR 
+COMMUNICATION WITH YOU, AND THE PROVIDER SPECIFICALLY DISCLAIMS ANY IMPLIED 
+WARRANTY OF MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE OR 
+NON-INFRINGEMNT OF THIRD PARTY RIGHTS. THE PROVIDER DOES NOT WARRANT THAT USE 
+OF THE SOFTWARE WILL BE UNINTERRUPTED OR ERROR FREE. YOU ASSUME RESPONSIBILITY 
+FOR SELECTION OF THE SOFTWARE TO ACHIEVE ITS INTENDED RESULTS AND FOR THE 
+PROPER INSTALLATION, USE, AND RESULTS OBTAINED FROM THE SOFTWARE. YOU ASSUME 
+THE ENTIRE RISK OF THE SOFTWARE PROVING DEFECTIVE OR FAILING TO PERFORM 
+PROPERLY, AND IN SUCH EVENT, YOU ASSUME THE ENTIRE COST AND RISK OF ANY 
+REPAIR, SERVICE, CORRECTION, OR ANY OTHER LIABILITIES OR DAMAGES CAUSED BY OR 
+ASSOCIATED WITH THE SOFTWARE. THE SOLE LIABILITIES AND REMEDIES ASSOCIATED 
+WITH THE SOFTWARE ARE SET FORTH ABOVE. 
+
+6. Export Control. You agree that neither the Software nor any Derivative 
+Work will be exported, directly or indirectly, into any country or to any 
+person or entity, in violation of laws or regulations of the United States 
+government. This Agreement will be governed by the substantive laws of the 
+State of Oregon, USA.
+
+7. Default and Termination. This Agreement will continue indefinitely, until 
+and unless terminated. You may terminate this Agreement by destroying all 
+copies of the materials to which this Agreement applies.  The Agreement will 
+terminate automatically if due to any event, including court judgment, You 
+fail to perform any of its obligations hereunder. In the event of termination, 
+others that have received software from You under the terms of this Agreement 
+may continue to use it provided they remain in compliance with the terms of 
+this Agreement.
+
+8. Your use of this Software is governed by this Lattice Semiconductor 
+Corporation Open Source License Agreement.  However, depending on your design, 
+the output files generated by the LatticeMico32 System may contain open 
+source code provided by a third party.  Specifically, the output files may 
+contain open source code that is licensed pursuant to the terms attached to 
+the Lattice Semiconductor Corporation LatticeMico32 System License Agreement 
+as Appendix B.  By agreeing to the terms of this Lattice Semiconductor 
+Corporation Open Source License Agreement, you are also agreeing to use such 
+code in accordance with the terms of the agreement under which such code has 
+been licensed, if applicable.
+
+9. From time to time Lattice Semiconductor Corporation may issue revised 
+versions of the Lattice Semiconductor Open Source License Agreement.  
+Revisions will follow the spirit of this version but will contain adjustments 
+and clarifications to address issues and concerns of Lattice and the user 
+community.
+
+©2006-2008 Lattice Semiconductor Corporation. You may freely distribute 
+the text of this Agreement provided you include this copyright notice.  
+However, modifications to the substantive terms herein are not permitted. 
diff --git a/milkymist-core/LICENSE.LGPL b/milkymist-core/LICENSE.LGPL
new file mode 100644 (file)
index 0000000..cca7fc2
--- /dev/null
@@ -0,0 +1,165 @@
+                  GNU LESSER GENERAL PUBLIC LICENSE
+                       Version 3, 29 June 2007
+
+ Copyright (C) 2007 Free Software Foundation, Inc. <http://fsf.org/>
+ Everyone is permitted to copy and distribute verbatim copies
+ of this license document, but changing it is not allowed.
+
+
+  This version of the GNU Lesser General Public License incorporates
+the terms and conditions of version 3 of the GNU General Public
+License, supplemented by the additional permissions listed below.
+
+  0. Additional Definitions.
+
+  As used herein, "this License" refers to version 3 of the GNU Lesser
+General Public License, and the "GNU GPL" refers to version 3 of the GNU
+General Public License.
+
+  "The Library" refers to a covered work governed by this License,
+other than an Application or a Combined Work as defined below.
+
+  An "Application" is any work that makes use of an interface provided
+by the Library, but which is not otherwise based on the Library.
+Defining a subclass of a class defined by the Library is deemed a mode
+of using an interface provided by the Library.
+
+  A "Combined Work" is a work produced by combining or linking an
+Application with the Library.  The particular version of the Library
+with which the Combined Work was made is also called the "Linked
+Version".
+
+  The "Minimal Corresponding Source" for a Combined Work means the
+Corresponding Source for the Combined Work, excluding any source code
+for portions of the Combined Work that, considered in isolation, are
+based on the Application, and not on the Linked Version.
+
+  The "Corresponding Application Code" for a Combined Work means the
+object code and/or source code for the Application, including any data
+and utility programs needed for reproducing the Combined Work from the
+Application, but excluding the System Libraries of the Combined Work.
+
+  1. Exception to Section 3 of the GNU GPL.
+
+  You may convey a covered work under sections 3 and 4 of this License
+without being bound by section 3 of the GNU GPL.
+
+  2. Conveying Modified Versions.
+
+  If you modify a copy of the Library, and, in your modifications, a
+facility refers to a function or data to be supplied by an Application
+that uses the facility (other than as an argument passed when the
+facility is invoked), then you may convey a copy of the modified
+version:
+
+   a) under this License, provided that you make a good faith effort to
+   ensure that, in the event an Application does not supply the
+   function or data, the facility still operates, and performs
+   whatever part of its purpose remains meaningful, or
+
+   b) under the GNU GPL, with none of the additional permissions of
+   this License applicable to that copy.
+
+  3. Object Code Incorporating Material from Library Header Files.
+
+  The object code form of an Application may incorporate material from
+a header file that is part of the Library.  You may convey such object
+code under terms of your choice, provided that, if the incorporated
+material is not limited to numerical parameters, data structure
+layouts and accessors, or small macros, inline functions and templates
+(ten or fewer lines in length), you do both of the following:
+
+   a) Give prominent notice with each copy of the object code that the
+   Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the object code with a copy of the GNU GPL and this license
+   document.
+
+  4. Combined Works.
+
+  You may convey a Combined Work under terms of your choice that,
+taken together, effectively do not restrict modification of the
+portions of the Library contained in the Combined Work and reverse
+engineering for debugging such modifications, if you also do each of
+the following:
+
+   a) Give prominent notice with each copy of the Combined Work that
+   the Library is used in it and that the Library and its use are
+   covered by this License.
+
+   b) Accompany the Combined Work with a copy of the GNU GPL and this license
+   document.
+
+   c) For a Combined Work that displays copyright notices during
+   execution, include the copyright notice for the Library among
+   these notices, as well as a reference directing the user to the
+   copies of the GNU GPL and this license document.
+
+   d) Do one of the following:
+
+       0) Convey the Minimal Corresponding Source under the terms of this
+       License, and the Corresponding Application Code in a form
+       suitable for, and under terms that permit, the user to
+       recombine or relink the Application with a modified version of
+       the Linked Version to produce a modified Combined Work, in the
+       manner specified by section 6 of the GNU GPL for conveying
+       Corresponding Source.
+
+       1) Use a suitable shared library mechanism for linking with the
+       Library.  A suitable mechanism is one that (a) uses at run time
+       a copy of the Library already present on the user's computer
+       system, and (b) will operate properly with a modified version
+       of the Library that is interface-compatible with the Linked
+       Version.
+
+   e) Provide Installation Information, but only if you would otherwise
+   be required to provide such information under section 6 of the
+   GNU GPL, and only to the extent that such information is
+   necessary to install and execute a modified version of the
+   Combined Work produced by recombining or relinking the
+   Application with a modified version of the Linked Version. (If
+   you use option 4d0, the Installation Information must accompany
+   the Minimal Corresponding Source and Corresponding Application
+   Code. If you use option 4d1, you must provide the Installation
+   Information in the manner specified by section 6 of the GNU GPL
+   for conveying Corresponding Source.)
+
+  5. Combined Libraries.
+
+  You may place library facilities that are a work based on the
+Library side by side in a single library together with other library
+facilities that are not Applications and are not covered by this
+License, and convey such a combined library under terms of your
+choice, if you do both of the following:
+
+   a) Accompany the combined library with a copy of the same work based
+   on the Library, uncombined with any other library facilities,
+   conveyed under the terms of this License.
+
+   b) Give prominent notice with the combined library that part of it
+   is a work based on the Library, and explaining where to find the
+   accompanying uncombined form of the same work.
+
+  6. Revised Versions of the GNU Lesser General Public License.
+
+  The Free Software Foundation may publish revised and/or new versions
+of the GNU Lesser General Public License from time to time. Such new
+versions will be similar in spirit to the present version, but may
+differ in detail to address new problems or concerns.
+
+  Each version is given a distinguishing version number. If the
+Library as you received it specifies that a certain numbered version
+of the GNU Lesser General Public License "or any later version"
+applies to it, you have the option of following the terms and
+conditions either of that published version or of any later version
+published by the Free Software Foundation. If the Library as you
+received it does not specify a version number of the GNU Lesser
+General Public License, you may choose any version of the GNU Lesser
+General Public License ever published by the Free Software Foundation.
+
+  If the Library as you received it specifies that a proxy can decide
+whether future versions of the GNU Lesser General Public License shall
+apply, that proxy's public statement of acceptance of any version is
+permanent authorization for you to choose that version for the
+Library.
diff --git a/milkymist-core/README b/milkymist-core/README
new file mode 100644 (file)
index 0000000..38cc4d6
--- /dev/null
@@ -0,0 +1,164 @@
+[> Milkymist(tm) Visual Synthesizer
+--------------------------------------
+
+This is the complete core source code and documentation for Milkymist(tm),
+an opensource VJing system-on-chip for FPGA boards,
+compatible with MilkDrop presets.
+
+For the latest releases, binary distributions and more:
+  http://www.milkymist.org
+
+
+[> Directory Structure
+ /cores/      Cores library, with Verilog sources, test benches and documentation.
+ /boards/     Top-level design files, constraint files and Makefiles
+              for supported FPGA boards.
+ /software/   Software for the SoC.
+ /std/        Definitions for Milkymist protocols and formats.
+ /doc/        System documentation.
+ /tools/      Small tools for developers.
+ /presets/    Example presets.
+
+
+[> Building tools
+You will need:
+ - GNU Make,
+ - Bourne Again Shell (bash),
+ - Xilinx ISE for synthesizing the FPGA bitstream (WebPack is enough),
+ - native GCC toolchain for the host-side tools,
+ - LatticeMico32 toolchain for building the SoC software,
+For the demonstration firmware:
+ - RE2C,
+ - Lemon parser generator,
+ - Scilab.
+
+For better synthesis performance (optional):
+ - Synplify Pro (Synopsys),
+ - or Precision RTL (Mentor Graphics).
+
+NB. Before switching synthesis tools, don't forget to run "make clean" in the
+synthesis directory.
+
+
+[> Scripts
+[>> Building
+ /boards/xxx/synthesis/build/system.bit build_bitstream.sh FPGA bitstream.
+ /software/bios/image.bin               build_bios.sh      BIOS image.
+ /software/demo/image.bin               build_demo.sh      Demonstration firmware image.
+ /doc/xxx.pdf                           build_doc.sh       System-wide documentation.
+ /cores/xxx/doc/xxx.pdf                 build_doc.sh       Core-specific documentation.
+
+[>> Loading
+ - load_bitstream.sh  : loads bitstream in volatile memory.
+ - flash_bitstream.sh : loads bitstream in non-volatile memory.
+ - flash_bios.sh      : loads BIOS into NOR flash (currently no way of storing it
+                        in volatile memory).
+ - load_demo.sh       : runs a SFL server and terminal program that downloads the
+                        demo firmware at device boot.
+
+
+[> Quickstart
+1- connect serial and JTAG cables
+2- connect VGA monitor
+3- build & load:
+./build_bitstream.sh
+./build_bios.sh
+./build_demo.sh
+./flash_bios.sh
+./load_demo.sh # will stay attached to display system debug messages
+./load_bitstream.sh # from another terminal
+
+# if you like it
+./flash_bitstream.sh
+cp software/demo/image.bin /memory_card/
+
+
+[> Development
+For Verilog simulations, the scripts (usually Makefiles) shipped with the test benches 
+take care of running the simulator.
+
+Depending on the IP core, one or more of these free simulators are supported:
+ - Icarus Verilog (http://www.icarus.com/eda/verilog/)
+ - GPL Cver (http://www.pragmatic-c.com/gpl-cver/)
+ - Verilator (http://www.veripool.org/wiki/verilator)
+
+For firmware development, a serial console program compatible with automatic firmware
+loading over the serial line (SFL boot) is provided in the /tools/ directory.
+
+
+[> Credits
+Most of the code is (c) Copyright 2007, 2008, 2009 Sebastien Bourdeauducq
+and licensed under eGPL (www.egpl.info). See the LICENSE file for more information.
+The software support library (software/baselib + software/include)
+is licensed under LGPLv3. See LICENSE.LGPL.
+Milkymist is a trademark of Sebastien Bourdeauducq.
+
+The SoC design uses:
+ - the Mico32 soft-processor by Lattice Semiconductor. See the LICENSE.LATTICE file.
+ - a modified version of wb_conbus by Johny Chi and Rudolf Usselmann. See LICENSE.LGPL.
+
+The directory organization and build scripts were inspired by soc-lm32 by the German
+hackerspace Das Labor. Some of the UART and timer code also comes from there.
+
+The demonstration firmware includes:
+ - the SoftFloat IEC/IEEE Floating-point Arithmetic Package, Release 2,
+   written by John R. Hauser. See source files headers for license.
+ - fundamental functions library by Jesus Calvino-Fraga. See the LICENSE.LGPL file.
+ - line drawing code from the GD library. See the LICENSE.GD file.
+
+Special thanks to the people who did significant things which made this project possible:
+ - Lattice Semiconductor for the Mico32 processor,
+ - Shawn Tan for the AEMB processor (used earlier),
+ - Stephen Williams for Icarus Verilog,
+ - Pragmatic C Software for GPL Cver,
+ - Wilson Snyder for Verilator,
+ - Henry from Xilinx,
+ - Das Labor for providing neat build scripts for SoCs (soc-lm32).
+
+
+[> Contact
+E-mail: sebastien.bourdeauducq at lekernel daaht net
+Phone:  +46(0)765829261
+PGP:    0x9277FCF2
+
+-----BEGIN PGP PUBLIC KEY BLOCK-----
+Version: GnuPG v1.4.9 (GNU/Linux)
+
+mQGiBEnPSIoRBADK2T3lN98btWazmH8Wz8YX6ZY38l9ouq5CgucTYWgljUTB6WMI
+P3LPAKjp+LpaeeHC3C9cJcWqI1AmrcoemqUjeeez1Y9TIPSL4Qy5mp3pEQ/evxYy
+xQShzSOQQFZ3St4yC7eSKW629qO1F7P2939l4Icfwjubu77L7kYqI39MGwCgknSz
+PKDGRFo2mHsL5Kd4YDXMzeMD/jyO9cOQgpUNQWtIiMz9ju26nfKfI1XECB8rtvP+
+m2rHmqUnMcOd060lGyBvssZUPvllSxZ6931kXTHukWjuqYlVPy7JLpaFXMajJ/Eg
+JI8btTiXueHYxW0SwtoJcuLQes7bGNw78PhvhWpurPl95BEVgzBwDEmcjm/2wkyf
+B0AqBACmX2idI6CYDkHSMxb0UTyiR+65DgaDBN0UbKWoeAFOG19LRj5ugshSIPHy
+4lMhGbvIwSHqYxj+3LplFdz0jSWsbN7f8ZfykLveI2rTpStGTyitFkOsLpcqZg/h
+tsWyVi4XGqpsE7+DvS6Cn1oKiBDqhw3/mk0K33MzchSiCTMRQLQ8U2ViYXN0aWVu
+IEJvdXJkZWF1ZHVjcSA8c2ViYXN0aWVuLmJvdXJkZWF1ZHVjcUBsZWtlcm5lbC5u
+ZXQ+iGYEExECACYFAknPSIoCGyMFCQlmAYAGCwkIBwMCBBUCCAMEFgIDAQIeAQIX
+gAAKCRAWFy/1knf88qk5AJwPD2aqIRx3iVGoQLm8Kp6ewjno/ACfXVjCuRDVbh8V
+UC1OZoSM5JQ/mxi5BA0ESc9IihAQAPQMDGoiQh9q0JACjGK+igpBi9dwU4BGNvNz
+E6JYFtZTTQ/2XIPQ8lFm1OiIcCX9M6CGg2mn7K4lsnWtVwpKe2NoQNsRRUSBLpoY
+Y54E8ydYd2ivLYajxv9H1amqpdLaq5TP/qPS9PyQ9u2sUYZ9vbtFfsTVauDjq4ld
+waFI6YWM9s0zPcDQ1HVX94uVoKbovzU0dJDD+hz/HQiZPMahGFbxOAY6GgyoLI1c
+NSXPz7XABW3aNilumWUW3rJ0vhW7qozIfhyUaOmlRDvS6L8Hpc5rUQEe0zBVFl3+
+8y2O/OLAOUn1GwydXnj7PkPlvyzBHD7Pvp2tds0lpggndJaHOB7gAER5Sk/JZ+63
+KbsWTb3sVAqW31Ko3FNKVejjg/WuwkdV/5OaS/yuCt4e5okX7watzzksfItlpO0z
+HvuQ8oEYo3BEdHMLJphRpD4O3izvZee1Mh/NAGEBgaZ8w7MfIVyiUoPfnPdveM79
+fhseELiKK0ImJ1+ADLxoOq0Jh+Wv81Zkhm1GpX1L8gT1hHUqWTcF6yfR3Vp0Qy/m
+Fug5ARAGXkqZb5OQd0ENB5Jj6U82p7PQ6xzicB2fgpIgebjCL5Ycibd6000yRMfo
+oIk4tOpOFt39FeYQDFf9dKx0NV4u0lDUodkMr3itrtk7Se4VDH1SPFojdFwXiHmY
+oHhmm9YjAAMFD/9X69dPL+B2Q8N2ibFiTmL88+QM7upPUT+TGT2Z5CNrPTqUsiNG
+Ow70e1lQugPa55nI8QPFyzBGomJRZy7y2OutSv0Yog1BbZqdNamuN6v2tceuSgpk
+Hm80dpj1CkQa3WhLITMfvjL6/dznDbFpqx5i3yr0LaJAbQLl8LGrkwiEM8N4xIPA
+B1sbG17aOUgJth2CUQAy/i2DgtLp6WcpBn2Lgo6S3EU5itvq3TRUWeulLvaaDJSv
+f1J/zDOnl3kyjbCdaaIebTLBG8QSex9ogbnpXf7pQBqK78fuIeyjYUk0/7NBMiHt
+qW0KrC8BnsS8JtbwX/xBMDoU2vuxOnBs+Vu5b4GV+r5LHmTsbtlKuxvP9GS1/a9M
+3euzcyIUzzsdShIT6ekGpijLBUV40QhlnTQqaMjiYUimQ9AeaipP2D0ipZzqDi8F
+95WIYotRe49g1dRBjJiQiAmHJEOxUk7J1mYCThS4infc8pKwZulvz2uSel0pdjmN
+xu7LouhnMQNSAOgxgvdB5hc15xfcZAajhHGt2npKiD/uSWzwLKA86O/0EOAD/M8v
+HJFUY0gF7/IfBscSArSmRef4+wY6qdCYnxWKYU+vz0hKk4dnplEWWk+MbmLE5Tig
+9W6nuXzNjFhsKjVWqKjjYeggLITvKslLkv2eC9qE2uKDRNirXMZwCFMSDIhPBBgR
+AgAPBQJJz0iKAhsMBQkJZgGAAAoJEBYXL/WSd/zybSEAniuiaCR/7aYk94u06jiQ
+lRHoJGwiAJ9JnmgPtl71/XVNcFxNQqUxVTOvjg==
+=NnZi
+-----END PGP PUBLIC KEY BLOCK-----
diff --git a/milkymist-core/boards/xilinx-ml401/rtl/ddram.v b/milkymist-core/boards/xilinx-ml401/rtl/ddram.v
new file mode 100644 (file)
index 0000000..10dd676
--- /dev/null
@@ -0,0 +1,201 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+`include "setup.v"
+
+module ddram #(
+       parameter csr_addr = 4'h0
+) (
+       input sys_clk,
+       input sys_rst,
+       
+       /* Configuration interface */
+       input [13:0] csr_a,
+       input csr_we,
+       input [31:0] csr_di,
+       output [31:0] csr_do,
+       
+       /* FML 4x64 interface */
+       input [`SDRAM_DEPTH-1:0] fml_adr,
+       input fml_stb,
+       input fml_we,
+       output fml_ack,
+       input [7:0] fml_sel,
+       input [63:0] fml_di,
+       output [63:0] fml_do,
+       
+       /* DDRAM pads */
+       output sdram_clk_p,
+       output sdram_clk_n,
+       input sdram_clk_fb,
+       output sdram_cke,
+       output sdram_cs_n,
+       output sdram_we_n,
+       output sdram_cas_n,
+       output sdram_ras_n,
+       output [12:0] sdram_adr,
+       output [1:0] sdram_ba,
+       output [3:0] sdram_dqm,
+       inout [31:0] sdram_dq,
+       inout [3:0] sdram_dqs
+);
+
+`ifndef SIMULATION
+wire dqs_clk;
+wire idelay_clk;
+wire idelay_clk_buffered;
+wire locked1;
+DCM_PS #(
+       .CLKDV_DIVIDE(1.5),             // 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5
+
+       .CLKFX_DIVIDE(3),               // 1 to 32
+       .CLKFX_MULTIPLY(2),             // 2 to 32
+       
+       .CLKIN_DIVIDE_BY_2("FALSE"),
+       .CLKIN_PERIOD(`CLOCK_PERIOD),
+       .CLKOUT_PHASE_SHIFT("NONE"),
+       .CLK_FEEDBACK("1X"),
+       .DESKEW_ADJUST("SYSTEM_SYNCHRONOUS"),
+       .DFS_FREQUENCY_MODE("LOW"),
+       .DLL_FREQUENCY_MODE("LOW"),
+       .DUTY_CYCLE_CORRECTION("TRUE"),
+       .FACTORY_JF(16'hF0F0),
+       .PHASE_SHIFT(0),
+       .STARTUP_WAIT("FALSE")
+) clkgen_sdram (
+       .CLK0(sdram_clk_p),
+       .CLK90(),
+       .CLK180(sdram_clk_n),
+       .CLK270(),
+
+       .CLK2X(idelay_clk),
+       .CLK2X180(),
+
+       .CLKDV(),
+       .CLKFX(),
+       .CLKFX180(),
+       .LOCKED(locked1),
+       .CLKFB(sdram_clk_fb),
+       .CLKIN(sys_clk),
+       .RST(1'b0)
+);
+
+wire psen;
+wire psincdec;
+wire psdone;
+wire locked2;
+DCM_PS #(
+       .CLKDV_DIVIDE(1.5),             // 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5
+
+       .CLKFX_DIVIDE(3),               // 1 to 32
+       .CLKFX_MULTIPLY(2),             // 2 to 32
+       
+       .CLKIN_DIVIDE_BY_2("FALSE"),
+       .CLKIN_PERIOD(`CLOCK_PERIOD),
+       .CLKOUT_PHASE_SHIFT("VARIABLE_POSITIVE"),
+       .CLK_FEEDBACK("1X"),
+       .DESKEW_ADJUST("SYSTEM_SYNCHRONOUS"),
+       .DFS_FREQUENCY_MODE("LOW"),
+       .DLL_FREQUENCY_MODE("LOW"),
+       .DUTY_CYCLE_CORRECTION("TRUE"),
+       .FACTORY_JF(16'hF0F0),
+       .PHASE_SHIFT(0),
+       .STARTUP_WAIT("FALSE")
+) clkgen_dqs (
+       .CLK0(dqs_clk),
+       .CLK90(),
+       .CLK180(),
+       .CLK270(),
+
+       .CLK2X(),
+       .CLK2X180(),
+
+       .CLKDV(),
+       .CLKFX(),
+       .CLKFX180(),
+       .LOCKED(locked2),
+       .CLKFB(dqs_clk),
+       .CLKIN(sys_clk),
+       .RST(sys_rst),
+       
+       .PSEN(psen),
+       .PSINCDEC(psincdec),
+       .PSDONE(psdone),
+       .PSCLK(sys_clk)
+);
+
+BUFG idelay_clk_buffer(
+       .I(idelay_clk),
+       .O(idelay_clk_buffered)
+);
+
+IDELAYCTRL idelay_calibration(
+       .RDY(),
+       .REFCLK(idelay_clk_buffered),
+       .RST(1'b0)
+);
+`else
+reg dqs_clk;
+assign sdram_clk_p = sys_clk;
+assign sdram_clk_n = ~sys_clk;
+always @(sys_clk) #2.5 dqs_clk <= sys_clk;
+wire locked1 = 1'b1;
+wire locked2 = 1'b1;
+`endif
+
+hpdmc #(
+       .csr_addr(csr_addr),
+       .sdram_depth(`SDRAM_DEPTH),
+       .sdram_columndepth(`SDRAM_COLUMNDEPTH)
+) hpdmc (
+       .sys_clk(sys_clk),
+       .dqs_clk(dqs_clk),
+       .sys_rst(sys_rst),
+
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_di(csr_di),
+       .csr_do(csr_do),
+       
+       .fml_adr(fml_adr),
+       .fml_stb(fml_stb),
+       .fml_we(fml_we),
+       .fml_ack(fml_ack),
+       .fml_sel(fml_sel),
+       .fml_di(fml_di),
+       .fml_do(fml_do),
+       
+       .sdram_cke(sdram_cke),
+       .sdram_cs_n(sdram_cs_n),
+       .sdram_we_n(sdram_we_n),
+       .sdram_cas_n(sdram_cas_n),
+       .sdram_ras_n(sdram_ras_n),
+       .sdram_dqm(sdram_dqm),
+       .sdram_adr(sdram_adr),
+       .sdram_ba(sdram_ba),
+       .sdram_dq(sdram_dq),
+       .sdram_dqs(sdram_dqs),
+       
+       .dqs_psen(psen),
+       .dqs_psincdec(psincdec),
+       .dqs_psdone(psdone),
+
+       .pll_stat({locked2, locked1})
+);
+
+endmodule
diff --git a/milkymist-core/boards/xilinx-ml401/rtl/setup.v b/milkymist-core/boards/xilinx-ml401/rtl/setup.v
new file mode 100644 (file)
index 0000000..d57e4db
--- /dev/null
@@ -0,0 +1,55 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+/*
+ * Enable or disable some cores.
+ * A complete system would have them all except the debug cores
+ * but when working on a specific part, it's very useful to be
+ * able to cut down synthesis times.
+ */
+
+`define ENABLE_ACEUSB
+`define ENABLE_AC97
+`define ENABLE_PFPU
+`define ENABLE_TMU
+
+/*
+ * System clock frequency in Hz.
+ */
+`define CLOCK_FREQUENCY 100000000
+
+/*
+ * System clock period in ns (must be in sync with CLOCK_FREQUENCY).
+ */
+`define CLOCK_PERIOD 10
+
+/*
+ * Default baudrate for the debug UART.
+ */
+`define BAUD_RATE 115200
+
+/*
+ * SDRAM depth, in bytes (the number of bits you need to address the whole
+ * array with byte granularity)
+ */
+`define SDRAM_DEPTH 26
+
+/*
+ * SDRAM column depth (the number of column address bits)
+ */
+`define SDRAM_COLUMNDEPTH 9
diff --git a/milkymist-core/boards/xilinx-ml401/rtl/system.v b/milkymist-core/boards/xilinx-ml401/rtl/system.v
new file mode 100644 (file)
index 0000000..6b81cc0
--- /dev/null
@@ -0,0 +1,998 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+`include "setup.v"
+
+module system(
+       input clkin,
+       input resetin,
+       
+       // Boot ROM
+       output [24:0] flash_adr,
+       input [31:0] flash_d,
+       output flash_byte_n,
+       output flash_oe_n,
+       output flash_we_n,
+       output flash_ce,
+       output flash_ac97_reset_n,
+       
+       output sram_clk,
+       output sram_ce_n,
+       output sram_zz,
+
+       // UART
+       input uart_rxd,
+       output uart_txd,
+
+       // DDR SDRAM
+       output sdram_clk_p,
+       output sdram_clk_n,
+       input sdram_clk_fb,
+       output sdram_cke,
+       output sdram_cs_n,
+       output sdram_we_n,
+       output sdram_cas_n,
+       output sdram_ras_n,
+       output [3:0] sdram_dqm,
+       output [12:0] sdram_adr,
+       output [1:0] sdram_ba,
+       inout [31:0] sdram_dq,
+       inout [3:0] sdram_dqs,
+       
+       // GPIO
+       input [4:0] btn,     // 5
+       output [4:0] btnled, //        5
+       output [3:0] led,    //        2 (2 LEDs for UART activity)
+       input [7:0] dipsw,   // 8
+       output lcd_e,        //        1
+       output lcd_rs,       //        1
+       output lcd_rw,       //        1
+       output [3:0] lcd_d,  //        4
+                            // 13     14
+
+       // VGA
+       output vga_psave_n,
+       output vga_hsync_n,
+       output vga_vsync_n,
+       output vga_sync_n,
+       output vga_blank_n,
+       output [7:0] vga_r,
+       output [7:0] vga_g,
+       output [7:0] vga_b,
+       output vga_clkout,
+       
+       // SystemACE/USB
+       output [6:0] aceusb_a,
+       inout [15:0] aceusb_d,
+       output aceusb_oe_n,
+       output aceusb_we_n,
+       input ace_clkin,
+       output ace_mpce_n,
+       input ace_mpirq,
+       output usb_cs_n,
+       output usb_hpi_reset_n,
+       input usb_hpi_int,
+       
+       // AC97
+       input ac97_clk,
+       input ac97_sin,
+       output ac97_sout,
+       output ac97_sync
+);
+
+//------------------------------------------------------------------
+// Clock and Reset Generation
+//------------------------------------------------------------------
+wire sys_clk;
+
+`ifndef SIMULATION
+BUFG clkbuf(
+       .I(clkin),
+       .O(sys_clk)
+);
+`else
+assign sys_clk = clkin;
+`endif
+
+`ifndef SIMULATION
+/* Synchronize the reset input */
+reg rst0;
+reg rst1;
+always @(posedge sys_clk) rst0 <= resetin;
+always @(posedge sys_clk) rst1 <= rst0;
+
+/* Debounce it (counter holds reset for 10.49ms),
+ * and generate power-on reset.
+ */
+reg [19:0] rst_debounce;
+reg sys_rst;
+initial rst_debounce <= 20'hFFFFF;
+initial sys_rst <= 1'b1;
+always @(posedge sys_clk) begin
+       if(~rst1) /* reset is active low */
+               rst_debounce <= 20'hFFFFF;
+       else if(rst_debounce != 16'd0)
+               rst_debounce <= rst_debounce - 16'd1;
+       sys_rst <= rst_debounce != 16'd0;
+end
+
+/*
+ * We must release the Flash reset before the system reset
+ * because the Flash needs some time to come out of reset
+ * and the CPU begins fetching instructions from it
+ * as soon as the system reset is released.
+ * From datasheet, minimum reset pulse width is 100ns
+ * and reset-to-read time is 150ns.
+ * On the ML401, the reset is combined with the AC97
+ * reset, which must be held for 1us.
+ * Here we use a 7-bit counter that holds reset
+ * for 1.28us and makes everybody happy.
+ */
+
+reg [7:0] flash_rstcounter;
+initial flash_rstcounter <= 8'd0;
+always @(posedge sys_clk) begin
+       if(~rst1 & ~sys_rst) /* ~sys_rst is for debouncing */
+               flash_rstcounter <= 8'd0;
+       else if(~flash_rstcounter[7])
+               flash_rstcounter <= flash_rstcounter + 8'd1;
+end
+
+assign flash_ac97_reset_n = flash_rstcounter[7];
+
+wire ac97_rst_n;
+assign ac97_rst_n = flash_rstcounter[7];
+
+`else
+wire sys_rst;
+assign sys_rst = ~resetin;
+`endif
+
+//------------------------------------------------------------------
+// Wishbone master wires
+//------------------------------------------------------------------
+wire [31:0]    cpuibus_adr,
+               cpudbus_adr,
+               ac97bus_adr,
+               pfpubus_adr,
+               tmumbus_adr;
+
+wire [2:0]     cpuibus_cti,
+               cpudbus_cti,
+               ac97bus_cti,
+               tmumbus_cti;
+
+wire [31:0]    cpuibus_dat_r,
+               cpudbus_dat_r,
+               cpudbus_dat_w,
+               ac97bus_dat_r,
+               ac97bus_dat_w,
+               pfpubus_dat_w,
+               tmumbus_dat_r;
+
+wire [3:0]     cpudbus_sel;
+
+wire           cpudbus_we,
+               ac97bus_we;
+
+wire           cpuibus_cyc,
+               cpudbus_cyc,
+               ac97bus_cyc,
+               pfpubus_cyc,
+               tmumbus_cyc;
+
+wire           cpuibus_stb,
+               cpudbus_stb,
+               ac97bus_stb,
+               pfpubus_stb,
+               tmumbus_stb;
+
+wire           cpuibus_ack,
+               cpudbus_ack,
+               ac97bus_ack,
+               tmumbus_ack,
+               pfpubus_ack;
+
+//------------------------------------------------------------------
+// Wishbone slave wires
+//------------------------------------------------------------------
+wire [31:0]    brg_adr,
+               norflash_adr,
+               bram_adr,
+               csrbrg_adr,
+               aceusb_adr;
+
+wire [2:0]     brg_cti,
+               bram_cti;
+
+wire [31:0]    brg_dat_r,
+               brg_dat_w,
+               norflash_dat_r,
+               bram_dat_r,
+               bram_dat_w,
+               csrbrg_dat_r,
+               csrbrg_dat_w,
+               aceusb_dat_r,
+               aceusb_dat_w;
+
+wire [3:0]     brg_sel,
+               bram_sel;
+
+wire           brg_we,
+               bram_we,
+               csrbrg_we,
+               aceusb_we;
+
+wire           brg_cyc,
+               norflash_cyc,
+               bram_cyc,
+               csrbrg_cyc,
+               aceusb_cyc;
+
+wire           brg_stb,
+               norflash_stb,
+               bram_stb,
+               csrbrg_stb,
+               aceusb_stb;
+
+wire           brg_ack,
+               norflash_ack,
+               bram_ack,
+               csrbrg_ack,
+               aceusb_ack;
+
+//---------------------------------------------------------------------------
+// Wishbone switch
+//---------------------------------------------------------------------------
+conbus #(
+       .s_addr_w(3),
+       .s0_addr(3'b000),       // norflash     0x00000000
+       .s1_addr(3'b001),       // bram         0x20000000
+       .s2_addr(3'b010),       // FML bridge   0x40000000
+       .s3_addr(3'b100),       // CSR bridge   0x80000000
+       .s4_addr(3'b101)        // aceusb       0xa0000000
+) conbus (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+
+       // Master 0
+       .m0_dat_i(32'hx),
+       .m0_dat_o(cpuibus_dat_r),
+       .m0_adr_i(cpuibus_adr),
+       .m0_cti_i(cpuibus_cti),
+       .m0_we_i(1'b0),
+       .m0_sel_i(4'hf),
+       .m0_cyc_i(cpuibus_cyc),
+       .m0_stb_i(cpuibus_stb),
+       .m0_ack_o(cpuibus_ack),
+       // Master 1
+       .m1_dat_i(cpudbus_dat_w),
+       .m1_dat_o(cpudbus_dat_r),
+       .m1_adr_i(cpudbus_adr),
+       .m1_cti_i(cpudbus_cti),
+       .m1_we_i(cpudbus_we),
+       .m1_sel_i(cpudbus_sel),
+       .m1_cyc_i(cpudbus_cyc),
+       .m1_stb_i(cpudbus_stb),
+       .m1_ack_o(cpudbus_ack),
+       // Master 2
+       .m2_dat_i(ac97bus_dat_w),
+       .m2_dat_o(ac97bus_dat_r),
+       .m2_adr_i(ac97bus_adr),
+       .m2_cti_i(ac97bus_cti),
+       .m2_we_i(ac97bus_we),
+       .m2_sel_i(4'hf),
+       .m2_cyc_i(ac97bus_cyc),
+       .m2_stb_i(ac97bus_stb),
+       .m2_ack_o(ac97bus_ack),
+       // Master 3
+       .m3_dat_i(pfpubus_dat_w),
+       .m3_dat_o(),
+       .m3_adr_i(pfpubus_adr),
+       .m3_cti_i(3'd0),
+       .m3_we_i(1'b1),
+       .m3_sel_i(4'hf),
+       .m3_cyc_i(pfpubus_cyc),
+       .m3_stb_i(pfpubus_stb),
+       .m3_ack_o(pfpubus_ack),
+       // Master 4
+       .m4_dat_i(32'bx),
+       .m4_dat_o(tmumbus_dat_r),
+       .m4_adr_i(tmumbus_adr),
+       .m4_cti_i(tmumbus_cti),
+       .m4_we_i(1'b0),
+       .m4_sel_i(4'hf),
+       .m4_cyc_i(tmumbus_cyc),
+       .m4_stb_i(tmumbus_stb),
+       .m4_ack_o(tmumbus_ack),
+
+       // Slave 0
+       .s0_dat_i(norflash_dat_r),
+       .s0_adr_o(norflash_adr),
+       .s0_cyc_o(norflash_cyc),
+       .s0_stb_o(norflash_stb),
+       .s0_ack_i(norflash_ack),
+       // Slave 1
+       .s1_dat_i(bram_dat_r),
+       .s1_dat_o(bram_dat_w),
+       .s1_adr_o(bram_adr),
+       .s1_cti_o(bram_cti),
+       .s1_sel_o(bram_sel),
+       .s1_we_o(bram_we),
+       .s1_cyc_o(bram_cyc),
+       .s1_stb_o(bram_stb),
+       .s1_ack_i(bram_ack),
+       // Slave 2
+       .s2_dat_i(brg_dat_r),
+       .s2_dat_o(brg_dat_w),
+       .s2_adr_o(brg_adr),
+       .s2_cti_o(brg_cti),
+       .s2_sel_o(brg_sel),
+       .s2_we_o(brg_we),
+       .s2_cyc_o(brg_cyc),
+       .s2_stb_o(brg_stb),
+       .s2_ack_i(brg_ack),
+       // Slave 3
+       .s3_dat_i(csrbrg_dat_r),
+       .s3_dat_o(csrbrg_dat_w),
+       .s3_adr_o(csrbrg_adr),
+       .s3_we_o(csrbrg_we),
+       .s3_cyc_o(csrbrg_cyc),
+       .s3_stb_o(csrbrg_stb),
+       .s3_ack_i(csrbrg_ack),
+       // Slave 4
+       .s4_dat_i(aceusb_dat_r),
+       .s4_dat_o(aceusb_dat_w),
+       .s4_adr_o(aceusb_adr),
+       .s4_we_o(aceusb_we),
+       .s4_cyc_o(aceusb_cyc),
+       .s4_stb_o(aceusb_stb),
+       .s4_ack_i(aceusb_ack)
+);
+
+//------------------------------------------------------------------
+// CSR bus
+//------------------------------------------------------------------
+wire [13:0]    csr_a;
+wire           csr_we;
+wire [31:0]    csr_dw;
+wire [31:0]    csr_dr_uart,
+               csr_dr_sysctl,
+               csr_dr_hpdmc,
+               csr_dr_vga,
+               csr_dr_ac97,
+               csr_dr_pfpu,
+               csr_dr_tmu;
+
+//------------------------------------------------------------------
+// FML master wires
+//------------------------------------------------------------------
+wire [`SDRAM_DEPTH-1:0]        fml_brg_adr,
+                       fml_vga_adr,
+                       fml_tmur_adr,
+                       fml_tmuw_adr;
+
+wire                   fml_brg_stb,
+                       fml_vga_stb,
+                       fml_tmur_stb,
+                       fml_tmuw_stb;
+
+wire                   fml_brg_we;
+
+wire                   fml_brg_ack,
+                       fml_vga_ack,
+                       fml_tmur_ack,
+                       fml_tmuw_ack;
+
+wire [7:0]             fml_brg_sel,
+                       fml_tmuw_sel;
+
+wire [63:0]            fml_brg_dw,
+                       fml_tmuw_dw;
+
+wire [63:0]            fml_brg_dr,
+                       fml_vga_dr,
+                       fml_tmur_dr;
+
+//------------------------------------------------------------------
+// FML slave wires, to memory controller
+//------------------------------------------------------------------
+wire [`SDRAM_DEPTH-1:0] fml_adr;
+wire fml_stb;
+wire fml_we;
+wire fml_ack;
+wire [7:0] fml_sel;
+wire [63:0] fml_dw;
+wire [63:0] fml_dr;
+
+//---------------------------------------------------------------------------
+// FML arbiter
+//---------------------------------------------------------------------------
+fmlarb #(
+       .fml_depth(`SDRAM_DEPTH)
+) fmlarb (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       
+       /* VGA framebuffer (high priority) */
+       .m0_adr(fml_vga_adr),
+       .m0_stb(fml_vga_stb),
+       .m0_we(1'b0),
+       .m0_ack(fml_vga_ack),
+       .m0_sel(8'bx),
+       .m0_di(64'bx),
+       .m0_do(fml_vga_dr),
+       
+       /* WISHBONE bridge */
+       .m1_adr(fml_brg_adr),
+       .m1_stb(fml_brg_stb),
+       .m1_we(fml_brg_we),
+       .m1_ack(fml_brg_ack),
+       .m1_sel(fml_brg_sel),
+       .m1_di(fml_brg_dw),
+       .m1_do(fml_brg_dr),
+       
+       /* TMU, pixel read DMA */
+       .m2_adr(fml_tmur_adr),
+       .m2_stb(fml_tmur_stb),
+       .m2_we(1'b0),
+       .m2_ack(fml_tmur_ack),
+       .m2_sel(8'bx),
+       .m2_di(64'bx),
+       .m2_do(fml_tmur_dr),
+       
+       /* TMU, pixel write DMA */
+       .m3_adr(fml_tmuw_adr),
+       .m3_stb(fml_tmuw_stb),
+       .m3_we(1'b1),
+       .m3_ack(fml_tmuw_ack),
+       .m3_sel(fml_tmuw_sel),
+       .m3_di(fml_tmuw_dw),
+       .m3_do(),
+       
+       .s_adr(fml_adr),
+       .s_stb(fml_stb),
+       .s_we(fml_we),
+       .s_ack(fml_ack),
+       .s_sel(fml_sel),
+       .s_di(fml_dr),
+       .s_do(fml_dw)
+);
+
+//---------------------------------------------------------------------------
+// WISHBONE to CSR bridge
+//---------------------------------------------------------------------------
+csrbrg csrbrg(
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       
+       .wb_adr_i(csrbrg_adr),
+       .wb_dat_i(csrbrg_dat_w),
+       .wb_dat_o(csrbrg_dat_r),
+       .wb_cyc_i(csrbrg_cyc),
+       .wb_stb_i(csrbrg_stb),
+       .wb_we_i(csrbrg_we),
+       .wb_ack_o(csrbrg_ack),
+       
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_do(csr_dw),
+       /* combine all slave->master data lines with an OR */
+       .csr_di(
+                csr_dr_uart
+               |csr_dr_sysctl
+               |csr_dr_hpdmc
+               |csr_dr_vga
+               |csr_dr_ac97
+               |csr_dr_pfpu
+               |csr_dr_tmu
+       )
+);
+
+//---------------------------------------------------------------------------
+// WISHBONE to FML bridge
+//---------------------------------------------------------------------------
+fmlbrg #(
+       .fml_depth(`SDRAM_DEPTH)
+) fmlbrg (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       
+       .wb_adr_i(brg_adr),
+       .wb_cti_i(brg_cti),
+       .wb_dat_o(brg_dat_r),
+       .wb_dat_i(brg_dat_w),
+       .wb_sel_i(brg_sel),
+       .wb_stb_i(brg_stb),
+       .wb_cyc_i(brg_cyc),
+       .wb_ack_o(brg_ack),
+       .wb_we_i(brg_we),
+       
+       .fml_adr(fml_brg_adr),
+       .fml_stb(fml_brg_stb),
+       .fml_we(fml_brg_we),
+       .fml_ack(fml_brg_ack),
+       .fml_sel(fml_brg_sel),
+       .fml_di(fml_brg_dr),
+       .fml_do(fml_brg_dw)
+);
+
+//---------------------------------------------------------------------------
+// Interrupts
+//---------------------------------------------------------------------------
+wire gpio_irq;
+wire timer0_irq;
+wire timer1_irq;
+wire uartrx_irq;
+wire uarttx_irq;
+wire ac97crrequest_irq;
+wire ac97crreply_irq;
+wire ac97dmar_irq;
+wire ac97dmaw_irq;
+wire pfpu_irq;
+wire tmu_irq;
+
+wire [31:0] cpu_interrupt_n;
+assign cpu_interrupt_n = {{21{1'b1}},
+       ~tmu_irq,
+       ~pfpu_irq,
+       ~ac97dmaw_irq,
+       ~ac97dmar_irq,
+       ~ac97crreply_irq,
+       ~ac97crrequest_irq,
+       ~uarttx_irq,
+       ~uartrx_irq,
+       ~timer1_irq,
+       ~timer0_irq,
+       ~gpio_irq
+};
+
+//---------------------------------------------------------------------------
+// LM32 CPU
+//---------------------------------------------------------------------------
+lm32_top cpu(
+       .clk_i(sys_clk),
+       .rst_i(sys_rst),
+       .interrupt_n(cpu_interrupt_n),
+
+       .I_ADR_O(cpuibus_adr),
+       .I_DAT_I(cpuibus_dat_r),
+       .I_DAT_O(),
+       .I_SEL_O(),
+       .I_CYC_O(cpuibus_cyc),
+       .I_STB_O(cpuibus_stb),
+       .I_ACK_I(cpuibus_ack),
+       .I_WE_O(),
+       .I_CTI_O(cpuibus_cti),
+       .I_LOCK_O(),
+       .I_BTE_O(),
+       .I_ERR_I(1'b0),
+       .I_RTY_I(1'b0),
+
+       .D_ADR_O(cpudbus_adr),
+       .D_DAT_I(cpudbus_dat_r),
+       .D_DAT_O(cpudbus_dat_w),
+       .D_SEL_O(cpudbus_sel),
+       .D_CYC_O(cpudbus_cyc),
+       .D_STB_O(cpudbus_stb),
+       .D_ACK_I(cpudbus_ack),
+       .D_WE_O (cpudbus_we),
+       .D_CTI_O(cpudbus_cti),
+       .D_LOCK_O(),
+       .D_BTE_O(),
+       .D_ERR_I(1'b0),
+       .D_RTY_I(1'b0)
+);
+
+//---------------------------------------------------------------------------
+// Boot ROM
+//---------------------------------------------------------------------------
+norflash32 #(
+       .adr_width(21)
+) norflash (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+
+       .wb_adr_i(norflash_adr),
+       .wb_dat_o(norflash_dat_r),
+       .wb_stb_i(norflash_stb),
+       .wb_cyc_i(norflash_cyc),
+       .wb_ack_o(norflash_ack),
+       
+       .flash_adr(flash_adr[21:1]),
+       .flash_d(flash_d)
+
+);
+
+assign flash_adr[0] = 1'b0;
+assign flash_adr[24:22] = 3'b000;
+
+assign flash_byte_n = 1'b1;
+assign flash_oe_n = 1'b0;
+assign flash_we_n = 1'b1;
+assign flash_ce = 1'b1;
+
+/*
+ * Disable the SRAM.
+ * Since CE_N is a synchronous input
+ * we also clock the SRAM so that
+ * we make sure it gets the message.
+ */
+assign sram_clk = sys_clk;
+assign sram_ce_n = 1'b1;
+assign sram_zz = 1'b1;
+
+//---------------------------------------------------------------------------
+// BRAM
+//---------------------------------------------------------------------------
+bram #(
+       .adr_width(12)
+) bram (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+
+       .wb_adr_i(bram_adr),
+       .wb_dat_o(bram_dat_r),
+       .wb_dat_i(bram_dat_w),
+       .wb_sel_i(bram_sel),
+       .wb_stb_i(bram_stb),
+       .wb_cyc_i(bram_cyc),
+       .wb_ack_o(bram_ack),
+       .wb_we_i(bram_we)
+);
+
+//---------------------------------------------------------------------------
+// UART
+//---------------------------------------------------------------------------
+uart #(
+       .csr_addr(4'h0),
+       .clk_freq(`CLOCK_FREQUENCY),
+       .baud(`BAUD_RATE)
+) uart (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_di(csr_dw),
+       .csr_do(csr_dr_uart),
+       
+       .rx_irq(uartrx_irq),
+       .tx_irq(uarttx_irq),
+       
+       .uart_rxd(uart_rxd),
+       .uart_txd(uart_txd)
+);
+
+/* LED0 and LED1 are used as TX/RX indicators.
+ * Generate long pulses so we have time to see them
+ */
+reg [18:0] rxcounter;
+reg rxled;
+always @(posedge sys_clk) begin
+       if(~uart_rxd)
+               rxcounter <= {19{1'b1}};
+       else if(rxcounter != 19'd0)
+               rxcounter <= rxcounter - 19'd1;
+       rxled <= rxcounter != 19'd0;
+end
+
+reg [18:0] txcounter;
+reg txled;
+always @(posedge sys_clk) begin
+       if(~uart_txd)
+               txcounter <= {19{1'b1}};
+       else if(txcounter != 19'd0)
+               txcounter <= txcounter - 20'd1;
+       txled <= txcounter != 19'd0;
+end
+
+assign led[0] = txled;
+assign led[1] = rxled;
+
+//---------------------------------------------------------------------------
+// System Controller
+//---------------------------------------------------------------------------
+wire [13:0] gpio_outputs;
+
+sysctl #(
+       .csr_addr(4'h1),
+       .ninputs(13),
+       .noutputs(14),
+       .systemid(32'h58343031) /* X401 */
+) sysctl (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+
+       .gpio_irq(gpio_irq),
+       .timer0_irq(timer0_irq),
+       .timer1_irq(timer1_irq),
+
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_di(csr_dw),
+       .csr_do(csr_dr_sysctl),
+
+       .gpio_inputs({dipsw, btn}),
+       .gpio_outputs(gpio_outputs)
+);
+
+/* LED0 and LED1 are used as TX/RX indicators. */
+
+assign led[2] = gpio_outputs[0];
+assign led[3] = gpio_outputs[1];
+assign btnled = gpio_outputs[6:2];
+assign lcd_e = gpio_outputs[7];
+assign lcd_rs = gpio_outputs[8];
+assign lcd_rw = gpio_outputs[9];
+assign lcd_d = gpio_outputs[13:10];
+
+//---------------------------------------------------------------------------
+// SystemACE/USB interface
+//---------------------------------------------------------------------------
+`ifdef ENABLE_ACEUSB
+aceusb aceusb(
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       
+       .wb_cyc_i(aceusb_cyc),
+       .wb_stb_i(aceusb_stb),
+       .wb_ack_o(aceusb_ack),
+       .wb_adr_i(aceusb_adr),
+       .wb_dat_i(aceusb_dat_w),
+       .wb_dat_o(aceusb_dat_r),
+       .wb_we_i(aceusb_we),
+       
+       .aceusb_a(aceusb_a),
+       .aceusb_d(aceusb_d),
+       .aceusb_oe_n(aceusb_oe_n),
+       .aceusb_we_n(aceusb_we_n),
+       .ace_clkin(ace_clkin),
+       .ace_mpce_n(ace_mpce_n),
+       .ace_mpirq(ace_mpirq),
+       .usb_cs_n(usb_cs_n),
+       .usb_hpi_reset_n(usb_hpi_reset_n),
+       .usb_hpi_int(usb_hpi_int)
+);
+`else
+assign aceusb_a = 7'd0;
+assign aceusb_d = 16'bz;
+assign aceusb_oe_n = 1'b1;
+assign aceusb_we_n = 1'b1;
+assign ace_mpce_n = 1'b0;
+assign usb_cs_n = 1'b1;
+assign usb_hpi_reset_n = 1'b1;
+assign aceusb_ack = aceusb_cyc & aceusb_stb;
+assign aceusb_dat_r = 32'habadface;
+`endif
+
+//---------------------------------------------------------------------------
+// DDR SDRAM
+//---------------------------------------------------------------------------
+ddram #(
+       .csr_addr(4'h2)
+) ddram (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_di(csr_dw),
+       .csr_do(csr_dr_hpdmc),
+
+       .fml_adr(fml_adr),
+       .fml_stb(fml_stb),
+       .fml_we(fml_we),
+       .fml_ack(fml_ack),
+       .fml_sel(fml_sel),
+       .fml_di(fml_dw),
+       .fml_do(fml_dr),
+       
+       .sdram_clk_p(sdram_clk_p),
+       .sdram_clk_n(sdram_clk_n),
+       .sdram_clk_fb(sdram_clk_fb),
+       .sdram_cke(sdram_cke),
+       .sdram_cs_n(sdram_cs_n),
+       .sdram_we_n(sdram_we_n),
+       .sdram_cas_n(sdram_cas_n),
+       .sdram_ras_n(sdram_ras_n),
+       .sdram_dqm(sdram_dqm),
+       .sdram_adr(sdram_adr),
+       .sdram_ba(sdram_ba),
+       .sdram_dq(sdram_dq),
+       .sdram_dqs(sdram_dqs)
+);
+
+//---------------------------------------------------------------------------
+// VGA
+//---------------------------------------------------------------------------
+vga #(
+       .csr_addr(4'h3),
+       .fml_depth(`SDRAM_DEPTH)
+) vga (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_di(csr_dw),
+       .csr_do(csr_dr_vga),
+       
+       .fml_adr(fml_vga_adr),
+       .fml_stb(fml_vga_stb),
+       .fml_ack(fml_vga_ack),
+       .fml_di(fml_vga_dr),
+       
+       .vga_psave_n(vga_psave_n),
+       .vga_hsync_n(vga_hsync_n),
+       .vga_vsync_n(vga_vsync_n),
+       .vga_sync_n(vga_sync_n),
+       .vga_blank_n(vga_blank_n),
+       .vga_r(vga_r),
+       .vga_g(vga_g),
+       .vga_b(vga_b),
+       .vga_clkout(vga_clkout)
+);
+
+//---------------------------------------------------------------------------
+// AC97
+//---------------------------------------------------------------------------
+`ifdef ENABLE_AC97
+ac97 #(
+       .csr_addr(4'h4)
+) ac97 (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       .ac97_clk(ac97_clk),
+       .ac97_rst_n(ac97_rst_n),
+       
+       .ac97_sin(ac97_sin),
+       .ac97_sout(ac97_sout),
+       .ac97_sync(ac97_sync),
+       
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_di(csr_dw),
+       .csr_do(csr_dr_ac97),
+       
+       .crrequest_irq(ac97crrequest_irq),
+       .crreply_irq(ac97crreply_irq),
+       .dmar_irq(ac97dmar_irq),
+       .dmaw_irq(ac97dmaw_irq),
+       
+       .wbm_adr_o(ac97bus_adr),
+       .wbm_cti_o(ac97bus_cti),
+       .wbm_we_o(ac97bus_we),
+       .wbm_cyc_o(ac97bus_cyc),
+       .wbm_stb_o(ac97bus_stb),
+       .wbm_ack_i(ac97bus_ack),
+       .wbm_dat_i(ac97bus_dat_r),
+       .wbm_dat_o(ac97bus_dat_w)
+);
+
+`else
+assign csr_dr_ac97 = 32'd0;
+
+assign ac97crrequest_irq = 1'b0;
+assign ac97crreply_irq = 1'b0;
+assign ac97dmar_irq = 1'b0;
+assign ac97dmaw_irq = 1'b0;
+
+assign ac97_sout = 1'b0;
+assign ac97_sync = 1'b0;
+
+assign ac97bus_adr = 32'bx;
+assign ac97bus_cti = 3'bx;
+assign ac97bus_we = 1'bx;
+assign ac97bus_cyc = 1'b0;
+assign ac97bus_stb = 1'b0;
+assign ac97bus_dat_w = 32'bx;
+`endif
+
+//---------------------------------------------------------------------------
+// Programmable FPU
+//---------------------------------------------------------------------------
+`ifdef ENABLE_PFPU
+pfpu #(
+       .csr_addr(4'h5)
+) pfpu (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_di(csr_dw),
+       .csr_do(csr_dr_pfpu),
+       
+       .irq(pfpu_irq),
+       
+       .wbm_dat_o(pfpubus_dat_w),
+       .wbm_adr_o(pfpubus_adr),
+       .wbm_cyc_o(pfpubus_cyc),
+       .wbm_stb_o(pfpubus_stb),
+       .wbm_ack_i(pfpubus_ack)
+);
+
+`else
+assign csr_dr_pfpu = 32'd0;
+
+assign pfpu_irq = 1'b0;
+
+assign pfpubus_dat_w = 32'hx;
+assign pfpubus_adr = 32'hx;
+assign pfpubus_cyc = 1'b0;
+assign pfpubus_stb = 1'b0;
+`endif
+
+//---------------------------------------------------------------------------
+// Texture Mapping Unit
+//---------------------------------------------------------------------------
+`ifdef ENABLE_TMU
+tmu #(
+       .csr_addr(4'h6),
+       .fml_depth(`SDRAM_DEPTH)
+) tmu (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_di(csr_dw),
+       .csr_do(csr_dr_tmu),
+       
+       .irq(tmu_irq),
+       
+       .wbm_adr_o(tmumbus_adr),
+       .wbm_cti_o(tmumbus_cti),
+       .wbm_cyc_o(tmumbus_cyc),
+       .wbm_stb_o(tmumbus_stb),
+       .wbm_ack_i(tmumbus_ack),
+       .wbm_dat_i(tmumbus_dat_r),
+       
+       .fmlr_adr(fml_tmur_adr),
+       .fmlr_stb(fml_tmur_stb),
+       .fmlr_ack(fml_tmur_ack),
+       .fmlr_di(fml_tmur_dr),
+       
+       .fmlw_adr(fml_tmuw_adr),
+       .fmlw_stb(fml_tmuw_stb),
+       .fmlw_ack(fml_tmuw_ack),
+       .fmlw_sel(fml_tmuw_sel),
+       .fmlw_do(fml_tmuw_dw)
+);
+
+`else
+assign csr_dr_tmu = 32'd0;
+
+assign tmu_irq = 1'b0;
+
+assign tmumbus_adr = 32'hx;
+assign tmumbus_cti = 3'bxxx;
+assign tmumbus_cyc = 1'b0;
+assign tmumbus_stb = 1'b0;
+
+assign fml_tmur_adr = {`SDRAM_DEPTH{1'bx}};
+assign fml_tmur_stb = 1'b0;
+
+assign fml_tmuw_adr = {`SDRAM_DEPTH{1'bx}};
+assign fml_tmuw_stb = 1'b0;
+assign fml_tmuw_sel = 8'bx;
+assign fml_tmuw_dw = 64'bx;
+`endif
+
+endmodule
diff --git a/milkymist-core/boards/xilinx-ml401/rtl/vga.v b/milkymist-core/boards/xilinx-ml401/rtl/vga.v
new file mode 100644 (file)
index 0000000..9bbb2ee
--- /dev/null
@@ -0,0 +1,88 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+`include "setup.v"
+
+module vga #(
+       parameter csr_addr = 4'h0,
+       parameter fml_depth = 26
+) (
+       input sys_clk,
+       input sys_rst,
+       
+       /* Configuration interface */
+       input [13:0] csr_a,
+       input csr_we,
+       input [31:0] csr_di,
+       output [31:0] csr_do,
+       
+       /* Framebuffer FML 4x64 interface */
+       output [fml_depth-1:0] fml_adr,
+       output fml_stb,
+       input fml_ack,
+       input [63:0] fml_di,
+       
+       /* VGA pads */
+       output vga_psave_n,
+       output vga_hsync_n,
+       output vga_vsync_n,
+       output vga_sync_n,
+       output vga_blank_n,
+       output [7:0] vga_r,
+       output [7:0] vga_g,
+       output [7:0] vga_b,
+       output vga_clkout
+);
+
+wire vga_clk;
+
+reg [1:0] fcounter;
+always @(posedge sys_clk) fcounter <= fcounter + 2'd1;
+assign vga_clk = fcounter[1];
+
+assign vga_clkout = vga_clk;
+
+vgafb #(
+       .csr_addr(csr_addr),
+       .fml_depth(fml_depth)
+) vgafb (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_di(csr_di),
+       .csr_do(csr_do),
+       
+       .fml_adr(fml_adr),
+       .fml_stb(fml_stb),
+       .fml_ack(fml_ack),
+       .fml_di(fml_di),
+       
+       .vga_clk(vga_clk),
+       .vga_psave_n(vga_psave_n),
+       .vga_hsync_n(vga_hsync_n),
+       .vga_vsync_n(vga_vsync_n),
+       .vga_sync_n(vga_sync_n),
+       .vga_blank_n(vga_blank_n),
+       .vga_r(vga_r),
+       .vga_g(vga_g),
+       .vga_b(vga_b)
+);
+
+endmodule
diff --git a/milkymist-core/boards/xilinx-ml401/sources.mak b/milkymist-core/boards/xilinx-ml401/sources.mak
new file mode 100644 (file)
index 0000000..c6e2bbd
--- /dev/null
@@ -0,0 +1,35 @@
+BOARD_SRC=$(wildcard $(BOARD_DIR)/*.v)
+
+CONBUS_SRC=$(wildcard $(CORES_DIR)/conbus/rtl/*.v)
+LM32_SRC=                                              \
+       $(CORES_DIR)/lm32/rtl/lm32_include.v            \
+       $(CORES_DIR)/lm32/rtl/lm32_cpu.v                \
+       $(CORES_DIR)/lm32/rtl/lm32_instruction_unit.v   \
+       $(CORES_DIR)/lm32/rtl/lm32_decoder.v            \
+       $(CORES_DIR)/lm32/rtl/lm32_load_store_unit.v    \
+       $(CORES_DIR)/lm32/rtl/lm32_adder.v              \
+       $(CORES_DIR)/lm32/rtl/lm32_addsub.v             \
+       $(CORES_DIR)/lm32/rtl/lm32_logic_op.v           \
+       $(CORES_DIR)/lm32/rtl/lm32_shifter.v            \
+       $(CORES_DIR)/lm32/rtl/lm32_multiplier.v         \
+       $(CORES_DIR)/lm32/rtl/lm32_mc_arithmetic.v      \
+       $(CORES_DIR)/lm32/rtl/lm32_interrupt.v          \
+       $(CORES_DIR)/lm32/rtl/lm32_ram.v                \
+       $(CORES_DIR)/lm32/rtl/lm32_icache.v             \
+       $(CORES_DIR)/lm32/rtl/lm32_dcache.v             \
+       $(CORES_DIR)/lm32/rtl/lm32_top.v
+FMLARB_SRC=$(wildcard $(CORES_DIR)/fmlarb/rtl/*.v)
+FMLBRG_SRC=$(wildcard $(CORES_DIR)/fmlbrg/rtl/*.v)
+CSRBRG_SRC=$(wildcard $(CORES_DIR)/csrbrg/rtl/*.v)
+NORFLASH_SRC=$(wildcard $(CORES_DIR)/norflash32/rtl/*.v)
+BRAM_SRC=$(wildcard $(CORES_DIR)/bram/rtl/*.v)
+UART_SRC=$(wildcard $(CORES_DIR)/uart/rtl/*.v)
+SYSCTL_SRC=$(wildcard $(CORES_DIR)/sysctl/rtl/*.v)
+ACEUSB_SRC=$(wildcard $(CORES_DIR)/aceusb/rtl/*.v)
+HPDMC_SRC=$(wildcard $(CORES_DIR)/hpdmc_ddr32/rtl/*.v)
+VGAFB_SRC=$(wildcard $(CORES_DIR)/vgafb/rtl/*.v)
+AC97_SRC=$(wildcard $(CORES_DIR)/ac97/rtl/*.v)
+PFPU_SRC=$(wildcard $(CORES_DIR)/pfpu/rtl/*.v)
+TMU_SRC=$(wildcard $(CORES_DIR)/tmu/rtl/*.v)
+
+CORES_SRC=$(CONBUS_SRC) $(LM32_SRC) $(FMLARB_SRC) $(FMLBRG_SRC) $(CSRBRG_SRC) $(NORFLASH_SRC) $(BRAM_SRC) $(UART_SRC) $(SYSCTL_SRC) $(ACEUSB_SRC) $(HPDMC_SRC) $(VGAFB_SRC) $(AC97_SRC) $(PFPU_SRC) $(TMU_SRC)
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/Makefile.precision b/milkymist-core/boards/xilinx-ml401/synthesis/Makefile.precision
new file mode 100644 (file)
index 0000000..7b3005a
--- /dev/null
@@ -0,0 +1,29 @@
+BOARD_DIR=../rtl
+CORES_DIR=../../../cores
+
+include ../sources.mak
+SRC=$(BOARD_SRC) $(CORES_SRC)
+
+all: build/system.bit
+
+build/system.ucf: common.ucf precision.ucf
+       cat common.ucf precision.ucf > build/system.ucf
+
+build/loadsources.tcl: $(SRC)
+       rm -f build/loadsources.tcl
+       for i in `echo $^`; do \
+           echo "add_input_file ../$$i" >> build/loadsources.tcl; \
+       done
+
+build/milkymist_impl/system.ucf: build/milkymist_impl/system.edf
+
+build/milkymist_impl/system.edf: build/loadsources.tcl build/system.ucf
+       rm -f build/milkymist.psp
+       rm -rf build/milkymist_impl
+       rm -rf build/milkymist_temp*
+       cd build && precision -shell -file ../precision.tcl
+
+build/system.ngd: build/milkymist_impl/system.edf
+       cd build && ngdbuild -uc milkymist_impl/system.ucf milkymist_impl/system.edf
+
+include common.mak
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/Makefile.synplify b/milkymist-core/boards/xilinx-ml401/synthesis/Makefile.synplify
new file mode 100644 (file)
index 0000000..78672fb
--- /dev/null
@@ -0,0 +1,34 @@
+BOARD_DIR=../rtl
+CORES_DIR=../../../cores
+
+include ../sources.mak
+SRC=$(BOARD_SRC) $(CORES_SRC)
+
+all: build/system.bit
+
+build/system.ucf: common.ucf synplify.ucf
+       cat common.ucf synplify.ucf > build/system.ucf
+
+build/loadsources.tcl: $(SRC)
+       rm -f build/loadsources.tcl
+       for i in `echo $^`; do \
+           echo "add_file -verilog -lib work \"../$$i\"" >> build/loadsources.tcl; \
+       done
+
+build/system.sdc: build/system.ucf
+       cd build && ucf2sdc -osdc system.sdc -iucf system.ucf
+
+build/synplicity.ucf: build/system.edf
+
+# YES ! Synplify is dirty enough to put all its bloated crapware in the script
+# directory rather than in the current directory. Work around this.
+build/synplify.prj: synplify.prj
+       cp synplify.prj build/synplify.prj
+
+build/system.edf: build/loadsources.tcl build/synplify.prj build/system.sdc
+       cd build && synplify_pro -batch synplify.prj
+
+build/system.ngd: build/system.edf build/synplicity.ucf
+       cd build && ngdbuild -uc synplicity.ucf system.edf
+
+include common.mak
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/Makefile.xst b/milkymist-core/boards/xilinx-ml401/synthesis/Makefile.xst
new file mode 100644 (file)
index 0000000..460182c
--- /dev/null
@@ -0,0 +1,25 @@
+BOARD_DIR=../rtl
+CORES_DIR=../../../cores
+
+include ../sources.mak
+SRC=$(BOARD_SRC) $(CORES_SRC)
+
+all: build/system.bit
+
+build/system.ucf: common.ucf xst.ucf
+       cat common.ucf xst.ucf > build/system.ucf
+
+build/system.prj: $(SRC)
+       rm -f build/system.prj
+       for i in `echo $^`; do \
+           echo "verilog work ../$$i" >> build/system.prj; \
+       done
+
+build/system.ngc: build/system.prj
+       cd build && xst -ifn ../system.xst
+
+build/system.ngd: build/system.ngc build/system.ucf
+       cd build && ngdbuild -uc system.ucf system.ngc
+
+include common.mak
+
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/common.mak b/milkymist-core/boards/xilinx-ml401/synthesis/common.mak
new file mode 100644 (file)
index 0000000..41f325d
--- /dev/null
@@ -0,0 +1,35 @@
+prom: build/system.mcs
+
+timing: build/system-routed.twr
+
+usage: build/system-routed.xdl
+       ../../../tools/xdlanalyze.pl build/system-routed.xdl 0
+
+load: build/system.bit
+       cd build && impact -batch ../load.cmd
+
+flash: build/system.mcs
+       cd build && impact -batch ../flash.cmd
+
+build/system.ncd: build/system.ngd
+       cd build && map system.ngd
+
+build/system-routed.ncd: build/system.ncd
+       cd build && par -ol high -xe n -w system.ncd system-routed.ncd
+
+build/system.bit: build/system-routed.ncd
+       cd build && bitgen -w system-routed.ncd system.bit
+
+build/system.mcs: build/system.bit
+       cd build && promgen -w -u 0 system
+
+build/system-routed.xdl: build/system-routed.ncd
+       cd build && xdl -ncd2xdl system-routed.ncd system-routed.xdl
+
+build/system-routed.twr: build/system-routed.ncd
+       cd build && trce -v 10 system-routed.ncd system.pcf
+
+clean:
+       rm -rf build/*
+
+.PHONY: prom timing usage load clean
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/common.ucf b/milkymist-core/boards/xilinx-ml401/synthesis/common.ucf
new file mode 100644 (file)
index 0000000..c42837d
--- /dev/null
@@ -0,0 +1,344 @@
+# ==== Clock input ====
+NET "clkin" LOC = AE14 | IOSTANDARD = LVCMOS33;
+
+NET "clkin" TNM_NET = "clkin";
+TIMESPEC "TSclkin" = PERIOD "clkin" 10 ns HIGH 50% INPUT_JITTER 100 ps;
+
+# ==== Reset button ====
+NET "resetin" LOC = D6 | IOSTANDARD = LVCMOS25;
+
+# ==== Linear Flash ====
+NET "flash_adr(0)" LOC = T20;
+NET "flash_adr(1)" LOC = Y1;
+NET "flash_adr(2)" LOC = Y2;
+NET "flash_adr(3)" LOC = AA1;
+NET "flash_adr(4)" LOC = AB1;
+NET "flash_adr(5)" LOC = AB2;
+NET "flash_adr(6)" LOC = AC1;
+NET "flash_adr(7)" LOC = AC2;
+NET "flash_adr(8)" LOC = AD1;
+NET "flash_adr(9)" LOC = AD2;
+NET "flash_adr(10)" LOC = AE3;
+NET "flash_adr(11)" LOC = AF3;
+NET "flash_adr(12)" LOC = W3;
+NET "flash_adr(13)" LOC = W6;
+NET "flash_adr(14)" LOC = W5;
+NET "flash_adr(15)" LOC = AA3;
+NET "flash_adr(16)" LOC = AA4;
+NET "flash_adr(17)" LOC = AB3;
+NET "flash_adr(18)" LOC = AB4;
+NET "flash_adr(19)" LOC = AC4;
+NET "flash_adr(20)" LOC = AB5;
+NET "flash_adr(21)" LOC = AC5;
+NET "flash_adr(22)" LOC = T19;
+NET "flash_adr(23)" LOC = U20;
+NET "flash_adr(24)" LOC = T21;
+
+NET "flash_adr(*)" IOSTANDARD = LVDCI_33;
+NET "flash_adr(*)" SLEW = FAST;
+NET "flash_adr(*)" DRIVE = 8;
+
+NET "flash_d(0)" LOC = AD13;
+NET "flash_d(1)" LOC = AC13;
+NET "flash_d(2)" LOC = AC15;
+NET "flash_d(3)" LOC = AC16;
+NET "flash_d(4)" LOC = AA11;
+NET "flash_d(5)" LOC = AA12;
+NET "flash_d(6)" LOC = AD14;
+NET "flash_d(7)" LOC = AC14;
+NET "flash_d(8)" LOC = AA13;
+NET "flash_d(9)" LOC = AB13;
+NET "flash_d(10)" LOC = AA15;
+NET "flash_d(11)" LOC = AA16;
+NET "flash_d(12)" LOC = AC11;
+NET "flash_d(13)" LOC = AC12;
+NET "flash_d(14)" LOC = AB14;
+NET "flash_d(15)" LOC = AA14;
+NET "flash_d(16)" LOC = D12;
+NET "flash_d(17)" LOC = E13;
+NET "flash_d(18)" LOC = C16;
+NET "flash_d(19)" LOC = D16;
+NET "flash_d(20)" LOC = D11;
+NET "flash_d(21)" LOC = C11;
+NET "flash_d(22)" LOC = E14;
+NET "flash_d(23)" LOC = D15;
+NET "flash_d(24)" LOC = D13;
+NET "flash_d(25)" LOC = D14;
+NET "flash_d(26)" LOC = F15;
+NET "flash_d(27)" LOC = F16;
+NET "flash_d(28)" LOC = F11;
+NET "flash_d(29)" LOC = F12;
+NET "flash_d(30)" LOC = F13;
+NET "flash_d(31)" LOC = F14;
+
+NET "flash_d(*)" IOSTANDARD = LVCMOS33;
+NET "flash_d(*)" PULLDOWN;
+
+NET "flash_byte_n" LOC = N22;
+NET "flash_byte_n" IOSTANDARD = LVDCI_33;
+NET "flash_byte_n" SLEW = FAST;
+NET "flash_byte_n" DRIVE = 8;
+
+NET "flash_oe_n" LOC = AC6;
+NET "flash_oe_n" IOSTANDARD = LVDCI_33;
+NET "flash_oe_n" SLEW = FAST;
+NET "flash_oe_n" DRIVE = 8;
+
+NET "flash_we_n" LOC = AB6;
+NET "flash_we_n" IOSTANDARD = LVDCI_33;
+NET "flash_we_n" SLEW = FAST;
+NET "flash_we_n" DRIVE = 8;
+
+NET "flash_ce" LOC = W7;
+NET "flash_ce" IOSTANDARD = LVDCI_33;
+NET "flash_ce" SLEW = FAST;
+NET "flash_ce" DRIVE = 8;
+
+NET "flash_ac97_reset_n" LOC = AD10;
+NET "flash_ac97_reset_n" IOSTANDARD = LVCMOS33;
+
+# We do not use the SRAM, but we need
+# to get the clock and select signals
+# to disable it in a non-Murphy-prone way.
+NET "sram_clk" LOC = AF7;
+NET "sram_clk" IOSTANDARD = LVCMOS33;
+NET "sram_clk" DRIVE = 16;
+NET "sram_clk" SLEW = FAST;
+
+NET "sram_ce_n" LOC = V7;
+NET "sram_ce_n" IOSTANDARD = LVDCI_33;
+NET "sram_ce_n" SLEW = FAST;
+NET "sram_ce_n" DRIVE = 8;
+
+NET "sram_zz" LOC = V25;
+NET "sram_zz" IOSTANDARD = LVDCI_33;
+NET "sram_zz" SLEW = FAST;
+NET "sram_zz" DRIVE = 8;
+
+# ==== UART ====
+NET "uart_rxd" LOC = W2 | IOSTANDARD = LVCMOS33;
+NET "uart_txd" LOC = W1 | IOSTANDARD = LVCMOS33;
+
+NET "uart_rxd" TIG;
+NET "uart_txd" TIG;
+
+# ==== Push buttons ====
+NET "btn(0)" LOC = E7 | IOSTANDARD = LVCMOS25;  # N
+NET "btn(1)" LOC = E9  | IOSTANDARD = LVCMOS25; # W
+NET "btn(2)" LOC = A6 | IOSTANDARD = LVCMOS25;  # S
+NET "btn(3)" LOC = F10 | IOSTANDARD = LVCMOS25; # E
+NET "btn(4)" LOC = B6 | IOSTANDARD = LVCMOS25;  # C
+
+# ==== Push button LEDs ====
+NET "btnled(0)" LOC = E2 | IOSTANDARD = LVCMOS25 | SLEW = SLOW | DRIVE = 8;  # N
+NET "btnled(1)" LOC = F9 | IOSTANDARD = LVCMOS25 | SLEW = SLOW | DRIVE = 8;  # W
+NET "btnled(2)" LOC = A5 | IOSTANDARD = LVCMOS25 | SLEW = SLOW | DRIVE = 8;  # S
+NET "btnled(3)" LOC = E10 | IOSTANDARD = LVCMOS25 | SLEW = SLOW | DRIVE = 8; # E
+NET "btnled(4)" LOC = C6 | IOSTANDARD = LVCMOS25 | SLEW = SLOW | DRIVE = 8;  # C
+
+# ==== LEDs ====
+NET "led(0)" LOC = G5 | IOSTANDARD = LVCMOS25 | SLEW = SLOW | DRIVE = 8;
+NET "led(1)" LOC = G6 | IOSTANDARD = LVCMOS25 | SLEW = SLOW | DRIVE = 8;
+NET "led(2)" LOC = A11 | IOSTANDARD = LVCMOS25 | SLEW = SLOW | DRIVE = 8;
+NET "led(3)" LOC = A12 | IOSTANDARD = LVCMOS25 | SLEW = SLOW | DRIVE = 8;
+
+# ==== DIP switches ====
+NET "dipsw(0)" LOC = R20 | IOSTANDARD = LVCMOS33;
+NET "dipsw(1)" LOC = R19 | IOSTANDARD = LVCMOS33;
+NET "dipsw(2)" LOC = T26 | IOSTANDARD = LVCMOS33;
+NET "dipsw(3)" LOC = U26 | IOSTANDARD = LVCMOS33;
+NET "dipsw(4)" LOC = U23 | IOSTANDARD = LVCMOS33;
+NET "dipsw(5)" LOC = V23 | IOSTANDARD = LVCMOS33;
+NET "dipsw(6)" LOC = U25 | IOSTANDARD = LVCMOS33;
+NET "dipsw(7)" LOC = U24 | IOSTANDARD = LVCMOS33;
+
+# ==== Character LCD ====
+NET "lcd_e" LOC = AE13 | IOSTANDARD = LVCMOS33;
+NET "lcd_rs" LOC = AC17 | IOSTANDARD = LVCMOS33;
+NET "lcd_rw" LOC = AB17 | IOSTANDARD = LVCMOS33;
+NET "lcd_d(0)" LOC = AB10 | IOSTANDARD = LVCMOS33; # DB4
+NET "lcd_d(1)" LOC = AC10 | IOSTANDARD = LVCMOS33; # DB5
+NET "lcd_d(2)" LOC = AE12 | IOSTANDARD = LVCMOS33; # DB6
+NET "lcd_d(3)" LOC = AF12 | IOSTANDARD = LVCMOS33; # DB7
+
+# ==== DDR SDRAM ====
+NET "sdram_adr(0)" LOC = C26;
+NET "sdram_adr(1)" LOC = E17;
+NET "sdram_adr(2)" LOC = D18;
+NET "sdram_adr(3)" LOC = C19;
+NET "sdram_adr(4)" LOC = F17;
+NET "sdram_adr(5)" LOC = B18;
+NET "sdram_adr(6)" LOC = B20;
+NET "sdram_adr(7)" LOC = C20;
+NET "sdram_adr(8)" LOC = D20;
+NET "sdram_adr(9)" LOC = C21;
+NET "sdram_adr(10)" LOC = A18;
+NET "sdram_adr(11)" LOC = B21;
+NET "sdram_adr(12)" LOC = A24;
+NET "sdram_ba(0)" LOC = B12;
+NET "sdram_ba(1)" LOC = A16;
+NET "sdram_cas_n" LOC = F23;
+NET "sdram_cke" LOC = G22;
+NET "sdram_cs_n" LOC = G21;
+NET "sdram_ras_n" LOC = F24;
+NET "sdram_we_n" LOC = A23;
+
+NET "sdram_clk_p" LOC = A10;
+NET "sdram_clk_fb" LOC = B13;
+NET "sdram_clk_n" LOC = B10;
+
+NET "sdram_dqm(0)" LOC = G19;
+NET "sdram_dqm(1)" LOC = G24;
+NET "sdram_dqm(2)" LOC = G20;
+NET "sdram_dqm(3)" LOC = C22;
+
+NET "sdram_dqs(0)" LOC = D25;
+NET "sdram_dqs(1)" LOC = G18;
+NET "sdram_dqs(2)" LOC = G17;
+NET "sdram_dqs(3)" LOC = D26;
+
+NET "sdram_dq(0)" LOC = H20;
+NET "sdram_dq(1)" LOC = E23;
+NET "sdram_dq(2)" LOC = H26;
+NET "sdram_dq(3)" LOC = H22;
+NET "sdram_dq(4)" LOC = E25;
+NET "sdram_dq(5)" LOC = E26;
+NET "sdram_dq(6)" LOC = F26;
+NET "sdram_dq(7)" LOC = E24;
+NET "sdram_dq(8)" LOC = E20;
+NET "sdram_dq(9)" LOC = A22;
+NET "sdram_dq(10)" LOC = C23;
+NET "sdram_dq(11)" LOC = C24;
+NET "sdram_dq(12)" LOC = A20;
+NET "sdram_dq(13)" LOC = A21;
+NET "sdram_dq(14)" LOC = D24;
+NET "sdram_dq(15)" LOC = E18;
+NET "sdram_dq(16)" LOC = F18;
+NET "sdram_dq(17)" LOC = A19;
+NET "sdram_dq(18)" LOC = F19;
+NET "sdram_dq(19)" LOC = B23;
+NET "sdram_dq(20)" LOC = E21;
+NET "sdram_dq(21)" LOC = D22;
+NET "sdram_dq(22)" LOC = D23;
+NET "sdram_dq(23)" LOC = B24;
+NET "sdram_dq(24)" LOC = E22;
+NET "sdram_dq(25)" LOC = F20;
+NET "sdram_dq(26)" LOC = H23;
+NET "sdram_dq(27)" LOC = G25;
+NET "sdram_dq(28)" LOC = G26;
+NET "sdram_dq(29)" LOC = H25;
+NET "sdram_dq(30)" LOC = H24;
+NET "sdram_dq(31)" LOC = H21;
+
+NET "sdram_adr(*)" IOSTANDARD = SSTL2_I;
+NET "sdram_ba(*)" IOSTANDARD = SSTL2_I;
+NET "sdram_cas_n" IOSTANDARD = SSTL2_I;
+NET "sdram_cke" IOSTANDARD = SSTL2_I;
+NET "sdram_clk_p" IOSTANDARD = SSTL2_I;
+NET "sdram_clk_fb" IOSTANDARD = LVCMOS25;
+NET "sdram_clk_n" IOSTANDARD = SSTL2_I;
+NET "sdram_cs_n" IOSTANDARD = SSTL2_I;
+NET "sdram_ras_n" IOSTANDARD = SSTL2_I;
+NET "sdram_we_n" IOSTANDARD = SSTL2_I;
+
+NET "sdram_dqs(*)" IOSTANDARD = SSTL2_II;
+NET "sdram_dqm(*)" IOSTANDARD = SSTL2_II;
+NET "sdram_dq(*)" IOSTANDARD = SSTL2_II;
+
+# ==== VGA output ====
+NET "vga_r(0)" LOC = N23 | IOSTANDARD = LVCMOS33; # yes, 3.3V for the 3 LSBs
+NET "vga_r(1)" LOC = N24 | IOSTANDARD = LVCMOS33;
+NET "vga_r(2)" LOC = N25 | IOSTANDARD = LVCMOS33;
+NET "vga_r(3)" LOC = C2 | IOSTANDARD = LVCMOS25; # and 2.5V for the rest
+NET "vga_r(4)" LOC = G7 | IOSTANDARD = LVCMOS25;
+NET "vga_r(5)" LOC = F7 | IOSTANDARD = LVCMOS25;
+NET "vga_r(6)" LOC = E5 | IOSTANDARD = LVCMOS25;
+NET "vga_r(7)" LOC = E6 | IOSTANDARD = LVCMOS25;
+
+NET "vga_r(*)" SLEW = FAST | DRIVE = 8;
+
+NET "vga_g(0)" LOC = M22 | IOSTANDARD = LVCMOS33;
+NET "vga_g(1)" LOC = M23 | IOSTANDARD = LVCMOS33;
+NET "vga_g(2)" LOC = M20 | IOSTANDARD = LVCMOS33;
+NET "vga_g(3)" LOC = E4 | IOSTANDARD = LVCMOS25;
+NET "vga_g(4)" LOC = D3 | IOSTANDARD = LVCMOS25;
+NET "vga_g(5)" LOC = H7 | IOSTANDARD = LVCMOS25;
+NET "vga_g(6)" LOC = H8 | IOSTANDARD = LVCMOS25;
+NET "vga_g(7)" LOC = C1 | IOSTANDARD = LVCMOS25;
+
+NET "vga_g(*)" SLEW = FAST | DRIVE = 8;
+
+NET "vga_b(0)" LOC = M21 | IOSTANDARD = LVCMOS33;
+NET "vga_b(1)" LOC = M26 | IOSTANDARD = LVCMOS33;
+NET "vga_b(2)" LOC = L26 | IOSTANDARD = LVCMOS33;
+NET "vga_b(3)" LOC = C5 | IOSTANDARD = LVCMOS25;
+NET "vga_b(4)" LOC = C7 | IOSTANDARD = LVCMOS25;
+NET "vga_b(5)" LOC = B7 | IOSTANDARD = LVCMOS25;
+NET "vga_b(6)" LOC = G8 | IOSTANDARD = LVCMOS25;
+NET "vga_b(7)" LOC = F8 | IOSTANDARD = LVCMOS25;
+
+NET "vga_b(*)" SLEW = FAST | DRIVE = 8;
+
+NET "vga_vsync_n" LOC = A8 | IOSTANDARD = LVCMOS25 | SLEW = FAST | DRIVE = 8;
+NET "vga_hsync_n" LOC = C10 | IOSTANDARD = LVCMOS25 | SLEW = FAST | DRIVE = 8;
+NET "vga_clkout" LOC = AF8 | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8;
+NET "vga_psave_n" LOC = M25 | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8;
+NET "vga_blank_n" LOC = M24 | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8;
+NET "vga_sync_n" LOC = L23 | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8;
+
+# ==== SystemACE/USB ====
+
+# Shared signals
+NET "aceusb_a(0)" LOC = U22;
+NET "aceusb_a(1)" LOC = Y10;
+NET "aceusb_a(2)" LOC = AA10;
+NET "aceusb_a(3)" LOC = AC7;
+NET "aceusb_a(4)" LOC = Y7;
+NET "aceusb_a(5)" LOC = AA9;
+NET "aceusb_a(6)" LOC = Y9;
+NET "aceusb_a(*)" IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8;
+NET "aceusb_d(0)" LOC = AB7;
+NET "aceusb_d(1)" LOC = AC9;
+NET "aceusb_d(2)" LOC = AB9;
+NET "aceusb_d(3)" LOC = AE6;
+NET "aceusb_d(4)" LOC = AD6;
+NET "aceusb_d(5)" LOC = AF9;
+NET "aceusb_d(6)" LOC = AE9;
+NET "aceusb_d(7)" LOC = AD8;
+NET "aceusb_d(8)" LOC = AC8;
+NET "aceusb_d(9)" LOC = AF4;
+NET "aceusb_d(10)" LOC = AE4;
+NET "aceusb_d(11)" LOC = AD3;
+NET "aceusb_d(12)" LOC = AC3;
+NET "aceusb_d(13)" LOC = AF6;
+NET "aceusb_d(14)" LOC = AF5;
+NET "aceusb_d(15)" LOC = AA7;
+NET "aceusb_d(*)" IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8 | PULLDOWN;
+NET "aceusb_oe_n" LOC = AA8 | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8;
+NET "aceusb_we_n" LOC = Y8 | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8;
+
+# SystemACE signals
+NET "ace_clkin" LOC = AF11;
+NET "ace_clkin" IOSTANDARD = LVCMOS33;
+NET "ace_clkin" TNM_NET = "ace_clkin";
+TIMESPEC "TSace" = PERIOD "ace_clkin" 30 ns HIGH 50% INPUT_JITTER 1 ns;
+
+NET "ace_mpce_n" LOC = AD5 | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8;
+NET "ace_mpirq" LOC = AD4 | IOSTANDARD = LVCMOS33 | TIG | PULLDOWN;
+
+# USB signals
+NET "usb_cs_n" LOC = AF10 | IOSTANDARD = LVCMOS33 | SLEW = FAST | DRIVE = 8;
+NET "usb_hpi_reset_n" LOC = A7 | IOSTANDARD = LVCMOS25 | TIG;
+NET "usb_hpi_int" LOC = V5 | IOSTANDARD = LVCMOS33 | TIG | PULLDOWN;
+
+# ==== AC97 ====
+NET "ac97_clk" LOC = AE10 | IOSTANDARD = LVCMOS33;
+NET "ac97_sin" LOC = AD16 | IOSTANDARD = LVCMOS33; # codec to FPGA
+NET "ac97_sout" LOC = C8 | IOSTANDARD = LVCMOS25;  # FPGA to codec
+NET "ac97_sync" LOC = D9 | IOSTANDARD = LVCMOS25;
+# reset is shared with Flash (see above)
+
+NET "ac97_clk" TNM_NET = "clkac97";
+TIMESPEC "TSclkac97" = PERIOD "clkac97" 80 HIGH 50%;
+
+
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/flash.cmd b/milkymist-core/boards/xilinx-ml401/synthesis/flash.cmd
new file mode 100644 (file)
index 0000000..ad0e8b8
--- /dev/null
@@ -0,0 +1,7 @@
+setMode -bscan
+setCable -p auto
+identify
+assignfile -p 2 -file system.mcs
+erase -p 2
+program -p 2
+quit
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/ioffs.sdc b/milkymist-core/boards/xilinx-ml401/synthesis/ioffs.sdc
new file mode 100644 (file)
index 0000000..9fd9ced
--- /dev/null
@@ -0,0 +1 @@
+define_global_attribute syn_useioff 1
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/load.cmd b/milkymist-core/boards/xilinx-ml401/synthesis/load.cmd
new file mode 100644 (file)
index 0000000..7c42f2b
--- /dev/null
@@ -0,0 +1,6 @@
+setMode -bscan
+setCable -p auto
+identify
+assignfile -p 3 -file system.bit
+program -p 3
+quit
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/precision.tcl b/milkymist-core/boards/xilinx-ml401/synthesis/precision.tcl
new file mode 100644 (file)
index 0000000..90b18f9
--- /dev/null
@@ -0,0 +1,20 @@
+new_project -name "milkymist" -folder "." -createimpl_name "milkymist_impl"
+
+setup_design -manufacturer "Xilinx" -family "VIRTEX-4" -part "4VLX25FF668" -speed "10"
+setup_design -retiming
+setup_design -max_fanout=10000
+setup_design -design "system"
+setup_design -basename "system"
+
+setup_design -compile_for_area=false
+setup_design -compile_for_timing=true
+
+source "loadsources.tcl"
+add_input_file "system.ucf" -exclude="false"
+add_input_file "../ioffs.sdc"
+
+compile
+synthesize
+
+save_impl
+close_project
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/precision.ucf b/milkymist-core/boards/xilinx-ml401/synthesis/precision.ucf
new file mode 100644 (file)
index 0000000..c2bf17b
--- /dev/null
@@ -0,0 +1,12 @@
+# LOC the DCMs related to SDRAM and the input BUFG
+# to prevent tools from randomly screwing up
+# the DDR timings when the design is changed.
+INST "clkbuf" LOC = BUFGCTRL_X0Y9;
+INST "ddram_clkgen_sdram" LOC = DCM_ADV_X0Y3;
+INST "ddram_clkgen_dqs" LOC = DCM_ADV_X0Y4;
+
+# 25MHz pixel clock only for now
+NET "vga_clk" TNM_NET = "clkvga";
+TIMESPEC "TSclkvga" = PERIOD "clkvga" 40 HIGH 50%;
+
+CONFIG STEPPING="ES";
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/synplify.prj b/milkymist-core/boards/xilinx-ml401/synthesis/synplify.prj
new file mode 100644 (file)
index 0000000..6a1c7dd
--- /dev/null
@@ -0,0 +1,30 @@
+set_option -vlog_std v2001
+
+source "loadsources.tcl"
+add_file "system.sdc"
+add_file "../ioffs.sdc"
+
+set_option -technology VIRTEX4
+set_option -part XC4VLX25
+set_option -package FF668
+set_option -speed_grade -10
+
+set_option -top_module system
+
+set_option -default_enum_encoding onehot
+set_option -symbolic_fsm_compiler 0
+set_option -resource_sharing 0
+
+set_option -fanout_limit 10000
+set_option -maxfan_hard 0
+set_option -retiming 1
+set_option -pipe 0
+set_option -disable_io_insertion 0
+
+set_option -include_path "../../../../cores/pfpu/rtl/"
+
+set_option -write_verilog false
+
+set_option -write_apr_constraint true
+
+project -result_file "system.edf"
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/synplify.ucf b/milkymist-core/boards/xilinx-ml401/synthesis/synplify.ucf
new file mode 100644 (file)
index 0000000..c0be01a
--- /dev/null
@@ -0,0 +1,11 @@
+# LOC the DCMs related to SDRAM and the input BUFG
+# to prevent tools from randomly screwing up
+# the DDR timings when the design is changed.
+INST "clkbuf" LOC = BUFGCTRL_X0Y9;
+INST "ddram/clkgen_sdram" LOC = DCM_ADV_X0Y3;
+INST "ddram/clkgen_dqs" LOC = DCM_ADV_X0Y4;
+
+# 25MHz pixel clock only for now
+NET "vga/fcounter(1)" TNM_NET = "clkvga";
+TIMESPEC "TSclkvga" = PERIOD "clkvga" 40 HIGH 50%;
+
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/system.xst b/milkymist-core/boards/xilinx-ml401/synthesis/system.xst
new file mode 100644 (file)
index 0000000..57cd0dd
--- /dev/null
@@ -0,0 +1,9 @@
+run
+-ifn system.prj
+-top system
+-ifmt MIXED
+-opt_mode AREA
+-opt_level 2
+-ofn system.ngc
+-p xc4vlx25-ff668-10
+-register_balancing yes
diff --git a/milkymist-core/boards/xilinx-ml401/synthesis/xst.ucf b/milkymist-core/boards/xilinx-ml401/synthesis/xst.ucf
new file mode 100644 (file)
index 0000000..5b132af
--- /dev/null
@@ -0,0 +1,12 @@
+# LOC the DCMs related to SDRAM and the input BUFG
+# to prevent tools from randomly screwing up
+# the DDR timings when the design is changed.
+INST "clkbuf" LOC = BUFGCTRL_X0Y9;
+INST "ddram/clkgen_sdram" LOC = DCM_ADV_X0Y3;
+INST "ddram/clkgen_dqs" LOC = DCM_ADV_X0Y4;
+
+# 25MHz pixel clock only for now
+NET "vga/fcounter(1)" TNM_NET = "clkvga";
+TIMESPEC "TSclkvga" = PERIOD "clkvga" 40 HIGH 50%;
+
+CONFIG STEPPING="ES";
diff --git a/milkymist-core/boards/xilinx-ml401/test/Makefile b/milkymist-core/boards/xilinx-ml401/test/Makefile
new file mode 100644 (file)
index 0000000..d377f02
--- /dev/null
@@ -0,0 +1,28 @@
+TOPDIR?=$(shell pwd)
+BOARD_DIR=$(TOPDIR)/../rtl
+CORES_DIR=$(TOPDIR)/../../../cores
+
+include ../sources.mak
+
+SIM_SRC=$(TOPDIR)/system_tb.v $(CORES_DIR)/hpdmc_ddr32/test/iddr.v $(CORES_DIR)/hpdmc_ddr32/test/oddr.v $(CORES_DIR)/hpdmc_ddr32/test/idelay.v
+
+SRC=$(SIM_SRC) $(BOARD_SRC) $(CORES_SRC)
+
+all: isim
+
+cversim: $(SRC) bios.rom
+       cver +define+SIMULATION +incdir+$(BOARD_DIR) +incdir+$(CORES_DIR)/lm32/rtl $(SRC)
+
+isim: system bios.rom
+       ./system
+
+system: $(SRC)
+       iverilog -D SIMULATION -I $(BOARD_DIR) -I $(CORES_DIR)/lm32/rtl -o system $(SRC)
+
+bios.rom: ../../../software/bios/bios.bin
+       ../../../tools/bin2hex ../../../software/bios/bios.bin bios.rom 32768
+
+clean:
+       rm -f verilog.log system
+
+.PHONY: clean cversim isim
diff --git a/milkymist-core/boards/xilinx-ml401/test/system_tb.v b/milkymist-core/boards/xilinx-ml401/test/system_tb.v
new file mode 100644 (file)
index 0000000..ffc13bd
--- /dev/null
@@ -0,0 +1,51 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+`timescale 1ns/1ps
+
+module system_tb();
+
+reg sys_clk;
+reg resetin;
+
+initial sys_clk = 1'b0;
+always #5 sys_clk = ~sys_clk;
+
+initial begin
+       resetin = 1'b0;
+       #200 resetin = 1'b1;
+end
+
+wire [24:0] flash_adr;
+reg [31:0] flash_d;
+reg [31:0] flash[0:32767];
+initial $readmemh("bios.rom", flash);
+always @(flash_adr) #110 flash_d = flash[flash_adr/2];
+
+system system(
+       .clkin(sys_clk),
+       .resetin(resetin),
+
+       .flash_adr(flash_adr),
+       .flash_d(flash_d),
+
+       .uart_rxd(),
+       .uart_txd()
+);
+
+endmodule
diff --git a/milkymist-core/build_bios.sh b/milkymist-core/build_bios.sh
new file mode 100755 (executable)
index 0000000..5717998
--- /dev/null
@@ -0,0 +1,45 @@
+#!/bin/bash
+
+BASEDIR=`pwd`
+LOGFILEHOST=$BASEDIR/tools.log
+LOGFILE=$BASEDIR/software.log
+
+echo "================================================================================"
+echo "Building Milkymist BIOS image"
+echo ""
+echo "Log file (host):   $LOGFILEHOST"
+echo "Log file (target): $LOGFILE"
+echo "================================================================================"
+echo ""
+
+echo -n "Building host utilities..."
+cd $BASEDIR/tools
+make > $LOGFILEHOST 2>&1
+if [ "$?" != 0 ] ; then
+        echo "FAILED"
+       exit 1
+else
+        echo "OK"
+fi
+
+echo "Building embedded software :"
+echo -n "  Base library..."
+cd $BASEDIR/software/baselib && make > $LOGFILE 2>&1
+if [ "$?" != 0 ] ; then
+        echo "FAILED"
+       exit 1
+else
+        echo "OK"
+fi
+echo -n "  BIOS..."
+cd $BASEDIR/software/bios && make >> $LOGFILE 2>&1
+if [ "$?" != 0 ] ; then
+        echo "FAILED"
+       exit 1
+else
+        echo "OK"
+fi
+
+cd $BASEDIR
+
+echo "Build complete!"
diff --git a/milkymist-core/build_bitstream.sh b/milkymist-core/build_bitstream.sh
new file mode 100755 (executable)
index 0000000..e95b52c
--- /dev/null
@@ -0,0 +1,27 @@
+#!/bin/bash
+
+source setup.inc
+BASEDIR=`pwd`
+LOGFILE=$BASEDIR/synthesis.log
+
+echo "================================================================================"
+echo "Building Milkymist bitstream file"
+echo ""
+echo "Synthesis tool: $SYNTOOL"
+echo "Board:          $BOARD"
+echo "Log file:       $LOGFILE"
+echo "================================================================================"
+echo ""
+
+echo -n "Building FPGA bitstream..."
+cd $BASEDIR/boards/$BOARD/synthesis && make -f Makefile.$SYNTOOL > $LOGFILE 2>&1
+if [ "$?" != 0 ] ; then
+        echo "FAILED"
+       exit 1
+else
+        echo "OK"
+fi
+
+cd $BASEDIR
+
+echo "Build complete!"
diff --git a/milkymist-core/build_demo.sh b/milkymist-core/build_demo.sh
new file mode 100755 (executable)
index 0000000..e7cd302
--- /dev/null
@@ -0,0 +1,55 @@
+#!/bin/bash
+
+BASEDIR=`pwd`
+LOGFILEHOST=$BASEDIR/tools.log
+LOGFILE=$BASEDIR/software.log
+
+echo "================================================================================"
+echo "Building Milkymist demo firmware"
+echo ""
+echo "Log file (host):   $LOGFILEHOST"
+echo "Log file (target): $LOGFILE"
+echo "================================================================================"
+echo ""
+
+BASEDIR=`pwd`
+
+echo -n "Building host utilities..."
+cd $BASEDIR/tools
+make > $LOGFILEHOST 2>&1
+if [ "$?" != 0 ] ; then
+        echo "FAILED"
+       exit 1
+else
+        echo "OK"
+fi
+
+echo "Building embedded software:"
+echo -n "  Base library..."
+cd $BASEDIR/software/baselib && make > $LOGFILE 2>&1
+if [ "$?" != 0 ] ; then
+        echo "FAILED"
+       exit 1
+else
+        echo "OK"
+fi
+echo -n "  Math library..."
+cd $BASEDIR/software/mathlib && make >> $LOGFILE 2>&1
+if [ "$?" != 0 ] ; then
+        echo "FAILED"
+       exit 1
+else
+        echo "OK"
+fi
+echo -n "  Demonstration firmware..."
+cd $BASEDIR/software/demo && make >> $LOGFILE 2>&1
+if [ "$?" != 0 ] ; then
+        echo "FAILED"
+       exit 1
+else
+        echo "OK"
+fi
+
+cd $BASEDIR
+
+echo "Build complete!"
diff --git a/milkymist-core/build_doc.sh b/milkymist-core/build_doc.sh
new file mode 100755 (executable)
index 0000000..ac583ab
--- /dev/null
@@ -0,0 +1,35 @@
+#!/bin/bash
+
+source coredoc.inc
+BASEDIR=`pwd`
+LOGFILE=$BASEDIR/doc.log
+
+echo "================================================================================"
+echo "Building Milkymist documentation"
+echo ""
+echo "Log file: $LOGFILE"
+echo "================================================================================"
+echo ""
+
+echo -n "Building system documentation..."
+cd $BASEDIR/doc && make > $LOGFILE 2>&1
+if [ "$?" != 0 ] ; then
+        echo "FAILED"
+else
+        echo "OK"
+fi
+
+echo "Building IP core documentation..."
+for i in $COREDOC; do
+       echo -n "  $i..."
+       cd $BASEDIR/cores/$i/doc && make >> $LOGFILE 2>&1
+       if [ "$?" != 0 ] ; then
+               echo "FAILED"
+       else
+               echo "OK"
+       fi
+done
+
+cd $BASEDIR
+
+echo "Build complete!"
diff --git a/milkymist-core/clean_all.sh b/milkymist-core/clean_all.sh
new file mode 100755 (executable)
index 0000000..a239fb6
--- /dev/null
@@ -0,0 +1,26 @@
+#!/bin/bash
+
+BASEDIR=`pwd`
+
+source $BASEDIR/coredoc.inc
+
+cd $BASEDIR/tools && make clean
+
+cd $BASEDIR/software/baselib && make clean
+cd $BASEDIR/software/mathlib && make clean
+cd $BASEDIR/software/bios && make clean
+cd $BASEDIR/software/demo && make clean
+
+cd $BASEDIR/boards/xilinx-ml401/synthesis && make -f common.mak clean
+
+cd $BASEDIR/doc && make clean
+for i in $COREDOC; do
+       cd $BASEDIR/cores/$i/doc && make clean
+done 
+
+cd $BASEDIR/cores/pfpu
+./cleanroms.sh
+
+cd $BASEDIR
+
+rm -f tools.log software.log synthesis.log doc.log load.log biosflash.log bitflash.log
diff --git a/milkymist-core/coredoc.inc b/milkymist-core/coredoc.inc
new file mode 100644 (file)
index 0000000..ba1f650
--- /dev/null
@@ -0,0 +1 @@
+COREDOC="ac97 aceusb bram conbus fmlarb fmlbrg hpdmc_ddr32 pfpu sysctl tmu uart vgafb"
diff --git a/milkymist-core/cores/ac97/doc/LM4550.pdf b/milkymist-core/cores/ac97/doc/LM4550.pdf
new file mode 100644 (file)
index 0000000..5482b8d
Binary files /dev/null and b/milkymist-core/cores/ac97/doc/LM4550.pdf differ
diff --git a/milkymist-core/cores/ac97/doc/Makefile b/milkymist-core/cores/ac97/doc/Makefile
new file mode 100644 (file)
index 0000000..3b779ab
--- /dev/null
@@ -0,0 +1,23 @@
+TEX=ac97.tex
+
+DVI=$(TEX:.tex=.dvi)
+PS=$(TEX:.tex=.ps)
+PDF=$(TEX:.tex=.pdf)
+AUX=$(TEX:.tex=.aux)
+LOG=$(TEX:.tex=.log)
+
+all: $(PDF)
+
+%.dvi: %.tex
+       latex $<
+
+%.ps: %.dvi
+       dvips $<
+
+%.pdf: %.ps
+       ps2pdf $<
+
+clean:
+       rm -f $(DVI) $(PS) $(PDF) $(AUX) $(LOG)
+
+.PHONY: clean
diff --git a/milkymist-core/cores/ac97/doc/ac97.tex b/milkymist-core/cores/ac97/doc/ac97.tex
new file mode 100644 (file)
index 0000000..0024559
--- /dev/null
@@ -0,0 +1,21 @@
+\documentclass[a4paper,11pt]{article}
+\usepackage{fullpage}
+\usepackage[latin1]{inputenc}
+\usepackage[T1]{fontenc}
+\usepackage[normalem]{ulem}
+\usepackage[english]{babel}
+\usepackage{listings,babel}
+\lstset{breaklines=true,basicstyle=\ttfamily}
+\usepackage{graphicx}
+\usepackage{moreverb}
+\usepackage{url}
+
+\title{AC97 controller}
+\author{S\'ebastien Bourdeauducq}
+\date{\today}
+\begin{document}
+\maketitle{}
+\section{Specifications}
+TODO
+
+\end{document}
diff --git a/milkymist-core/cores/ac97/doc/ac97_r23.pdf b/milkymist-core/cores/ac97/doc/ac97_r23.pdf
new file mode 100644 (file)
index 0000000..85e6d93
Binary files /dev/null and b/milkymist-core/cores/ac97/doc/ac97_r23.pdf differ
diff --git a/milkymist-core/cores/ac97/rtl/ac97.v b/milkymist-core/cores/ac97/rtl/ac97.v
new file mode 100644 (file)
index 0000000..9b7f1a4
--- /dev/null
@@ -0,0 +1,237 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+module ac97 #(
+       parameter csr_addr = 4'h0
+) (
+       input sys_clk,
+       input sys_rst,
+       input ac97_clk,
+       input ac97_rst_n,
+       
+       /* Codec interface */
+       input ac97_sin,
+       output ac97_sout,
+       output ac97_sync,
+       
+       /* Control interface */
+       input [13:0] csr_a,
+       input csr_we,
+       input [31:0] csr_di,
+       output [31:0] csr_do,
+       
+       /* Interrupts */
+       output crrequest_irq,
+       output crreply_irq,
+       output dmar_irq,
+       output dmaw_irq,
+       
+       /* DMA */
+       output [31:0] wbm_adr_o,
+       output [2:0] wbm_cti_o,
+       output wbm_we_o,
+       output wbm_cyc_o,
+       output wbm_stb_o,
+       input wbm_ack_i,
+       input [31:0] wbm_dat_i,
+       output [31:0] wbm_dat_o
+);
+
+wire up_stb;
+wire up_ack;
+wire up_sync;
+wire up_sdata;
+wire down_ready;
+wire down_stb;
+wire down_sync;
+wire down_sdata;
+ac97_transceiver transceiver(
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       .ac97_clk(ac97_clk),
+       .ac97_rst_n(ac97_rst_n),
+       
+       .ac97_sin(ac97_sin),
+       .ac97_sout(ac97_sout),
+       .ac97_sync(ac97_sync),
+       
+       .up_stb(up_stb),
+       .up_ack(up_ack),
+       .up_sync(up_sync),
+       .up_data(up_sdata),
+       
+       .down_ready(down_ready),
+       .down_stb(down_stb),
+       .down_sync(down_sync),
+       .down_data(down_sdata)
+);
+
+wire down_en;
+wire down_next_frame;
+wire down_addr_valid;
+wire [19:0] down_addr;
+wire down_data_valid;
+wire [19:0] down_data;
+wire down_pcmleft_valid;
+wire [19:0] down_pcmleft;
+wire down_pcmright_valid;
+wire [19:0] down_pcmright;
+ac97_framer framer(
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       
+       /* to transceiver */
+       .down_ready(down_ready),
+       .down_stb(down_stb),
+       .down_sync(down_sync),
+       .down_data(down_sdata),
+       
+       /* frame data */
+       .en(down_en),
+       .next_frame(down_next_frame),
+       .addr_valid(down_addr_valid),
+       .addr(down_addr),
+       .data_valid(down_data_valid),
+       .data(down_data),
+       .pcmleft_valid(down_pcmleft_valid),
+       .pcmleft(down_pcmleft),
+       .pcmright_valid(down_pcmright_valid),
+       .pcmright(down_pcmright)
+);
+
+wire up_en;
+wire up_next_frame;
+wire up_frame_valid;
+wire up_addr_valid;
+wire [19:0] up_addr;
+wire up_data_valid;
+wire [19:0] up_data;
+wire up_pcmleft_valid;
+wire [19:0] up_pcmleft;
+wire up_pcmright_valid;
+wire [19:0] up_pcmright;
+ac97_deframer deframer(
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       
+       .up_stb(up_stb),
+       .up_ack(up_ack),
+       .up_sync(up_sync),
+       .up_data(up_sdata),
+       
+       .en(up_en),
+       .next_frame(up_next_frame),
+       .frame_valid(up_frame_valid),
+       .addr_valid(up_addr_valid),
+       .addr(up_addr),
+       .data_valid(up_data_valid),
+       .data(up_data),
+       .pcmleft_valid(up_pcmleft_valid),
+       .pcmleft(up_pcmleft),
+       .pcmright_valid(up_pcmright_valid),
+       .pcmright(up_pcmright)
+);
+
+wire dmar_en;
+wire [29:0] dmar_addr;
+wire [15:0] dmar_remaining;
+wire dmar_next;
+wire dmaw_en;
+wire [29:0] dmaw_addr;
+wire [15:0] dmaw_remaining;
+wire dmaw_next;
+ac97_ctlif #(
+       .csr_addr(csr_addr)
+) ctlif (
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_di(csr_di),
+       .csr_do(csr_do),
+       
+       .crrequest_irq(crrequest_irq),
+       .crreply_irq(crreply_irq),
+       .dmar_irq(dmar_irq),
+       .dmaw_irq(dmaw_irq),
+       
+       .down_en(down_en),
+       .down_next_frame(down_next_frame),
+       .down_addr_valid(down_addr_valid),
+       .down_addr(down_addr),
+       .down_data_valid(down_data_valid),
+       .down_data(down_data),
+
+       .up_en(up_en),
+       .up_next_frame(up_next_frame),
+       .up_frame_valid(up_frame_valid),
+       .up_addr_valid(up_addr_valid),
+       .up_addr(up_addr),
+       .up_data_valid(up_data_valid),
+       .up_data(up_data),
+       
+       .dmar_en(dmar_en),
+       .dmar_addr(dmar_addr),
+       .dmar_remaining(dmar_remaining),
+       .dmar_next(dmar_next),
+       .dmaw_en(dmaw_en),
+       .dmaw_addr(dmaw_addr),
+       .dmaw_remaining(dmaw_remaining),
+       .dmaw_next(dmaw_next)
+);
+
+ac97_dma dma(
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       
+       .wbm_adr_o(wbm_adr_o),
+       .wbm_cti_o(wbm_cti_o),
+       .wbm_we_o(wbm_we_o),
+       .wbm_cyc_o(wbm_cyc_o),
+       .wbm_stb_o(wbm_stb_o),
+       .wbm_ack_i(wbm_ack_i),
+       .wbm_dat_i(wbm_dat_i),
+       .wbm_dat_o(wbm_dat_o),
+       
+       .down_en(down_en),
+       .down_next_frame(down_next_frame),
+       .down_pcmleft_valid(down_pcmleft_valid),
+       .down_pcmleft(down_pcmleft),
+       .down_pcmright_valid(down_pcmright_valid),
+       .down_pcmright(down_pcmright),
+       
+       .up_en(up_en),
+       .up_next_frame(up_next_frame),
+       .up_frame_valid(up_frame_valid),
+       .up_pcmleft_valid(up_pcmleft_valid),
+       .up_pcmleft(up_pcmleft),
+       .up_pcmright_valid(up_pcmright_valid),
+       .up_pcmright(up_pcmright),
+       
+       .dmar_en(dmar_en),
+       .dmar_addr(dmar_addr),
+       .dmar_remaining(dmar_remaining),
+       .dmar_next(dmar_next),
+       .dmaw_en(dmaw_en),
+       .dmaw_addr(dmaw_addr),
+       .dmaw_remaining(dmaw_remaining),
+       .dmaw_next(dmaw_next)
+);
+
+endmodule
diff --git a/milkymist-core/cores/ac97/rtl/ac97_asfifo.v b/milkymist-core/cores/ac97/rtl/ac97_asfifo.v
new file mode 100644 (file)
index 0000000..4a10588
--- /dev/null
@@ -0,0 +1,116 @@
+//==========================================
+// Function : Asynchronous FIFO (w/ 2 asynchronous clocks).
+// Coder    : Alex Claros F.
+// Date     : 15/May/2005.
+// Notes    : This implementation is based on the article 
+//            'Asynchronous FIFO in Virtex-II FPGAs'
+//            writen by Peter Alfke. This TechXclusive 
+//            article can be downloaded from the
+//            Xilinx website. It has some minor modifications.
+//=========================================
+
+`timescale 1ns / 1ps
+
+module ac97_asfifo
+  #(parameter    DATA_WIDTH    = 8,
+                 ADDRESS_WIDTH = 4,
+                 FIFO_DEPTH    = (1 << ADDRESS_WIDTH))
+     //Reading port
+    (output wire [DATA_WIDTH-1:0]        Data_out, 
+     output reg                          Empty_out,
+     input wire                          ReadEn_in,
+     input wire                          RClk,        
+     //Writing port.    
+     input wire  [DATA_WIDTH-1:0]        Data_in,  
+     output reg                          Full_out,
+     input wire                          WriteEn_in,
+     input wire                          WClk,
+     
+     input wire                          Clear_in);
+
+    /////Internal connections & variables//////
+    reg   [DATA_WIDTH-1:0]              Mem [FIFO_DEPTH-1:0];
+    wire  [ADDRESS_WIDTH-1:0]           pNextWordToWrite, pNextWordToRead;
+    wire                                EqualAddresses;
+    wire                                NextWriteAddressEn, NextReadAddressEn;
+    wire                                Set_Status, Rst_Status;
+    reg                                 Status;
+    wire                                PresetFull, PresetEmpty;
+    
+    //////////////Code///////////////
+    //Data ports logic:
+    //(Uses a dual-port RAM).
+    //'Data_out' logic:
+    assign  Data_out = Mem[pNextWordToRead];
+//    always @ (posedge RClk)
+//        if (!PresetEmpty)
+//            Data_out <= Mem[pNextWordToRead];
+//        if (ReadEn_in & !Empty_out)
+            
+    //'Data_in' logic:
+    always @ (posedge WClk)
+        if (WriteEn_in & !Full_out)
+            Mem[pNextWordToWrite] <= Data_in;
+
+    //Fifo addresses support logic: 
+    //'Next Addresses' enable logic:
+    assign NextWriteAddressEn = WriteEn_in & ~Full_out;
+    assign NextReadAddressEn  = ReadEn_in  & ~Empty_out;
+           
+    //Addreses (Gray counters) logic:
+    ac97_graycounter #(
+               .COUNTER_WIDTH( ADDRESS_WIDTH )
+    ) GrayCounter_pWr (
+        .GrayCount_out(pNextWordToWrite),
+        .Enable_in(NextWriteAddressEn),
+        .Clear_in(Clear_in),
+        
+        .Clk(WClk)
+       );
+       
+    ac97_graycounter #(
+               .COUNTER_WIDTH( ADDRESS_WIDTH )
+    ) GrayCounter_pRd (
+        .GrayCount_out(pNextWordToRead),
+        .Enable_in(NextReadAddressEn),
+        .Clear_in(Clear_in),
+        .Clk(RClk)
+       );
+     
+
+    //'EqualAddresses' logic:
+    assign EqualAddresses = (pNextWordToWrite == pNextWordToRead);
+
+    //'Quadrant selectors' logic:
+    assign Set_Status = (pNextWordToWrite[ADDRESS_WIDTH-2] ~^ pNextWordToRead[ADDRESS_WIDTH-1]) &
+                         (pNextWordToWrite[ADDRESS_WIDTH-1] ^  pNextWordToRead[ADDRESS_WIDTH-2]);
+                            
+    assign Rst_Status = (pNextWordToWrite[ADDRESS_WIDTH-2] ^  pNextWordToRead[ADDRESS_WIDTH-1]) &
+                         (pNextWordToWrite[ADDRESS_WIDTH-1] ~^ pNextWordToRead[ADDRESS_WIDTH-2]);
+                         
+    //'Status' latch logic:
+    always @ (Set_Status, Rst_Status, Clear_in) //D Latch w/ Asynchronous Clear & Preset.
+        if (Rst_Status | Clear_in)
+            Status = 0;  //Going 'Empty'.
+        else if (Set_Status)
+            Status = 1;  //Going 'Full'.
+            
+    //'Full_out' logic for the writing port:
+    assign PresetFull = Status & EqualAddresses;  //'Full' Fifo.
+    
+    always @ (posedge WClk, posedge PresetFull) //D Flip-Flop w/ Asynchronous Preset.
+        if (PresetFull)
+            Full_out <= 1;
+        else
+            Full_out <= 0;
+            
+    //'Empty_out' logic for the reading port:
+    assign PresetEmpty = ~Status & EqualAddresses;  //'Empty' Fifo.
+    
+    always @ (posedge RClk, posedge PresetEmpty)  //D Flip-Flop w/ Asynchronous Preset.
+        if (PresetEmpty)
+            Empty_out <= 1;
+        else
+            Empty_out <= 0;
+
+endmodule
diff --git a/milkymist-core/cores/ac97/rtl/ac97_ctlif.v b/milkymist-core/cores/ac97/rtl/ac97_ctlif.v
new file mode 100644 (file)
index 0000000..8934c11
--- /dev/null
@@ -0,0 +1,193 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+module ac97_ctlif #(
+       parameter csr_addr = 4'h0
+) (
+       input sys_clk,
+       input sys_rst,
+
+       input [13:0] csr_a,
+       input csr_we,
+       input [31:0] csr_di,
+       output reg [31:0] csr_do,
+       
+       output reg crrequest_irq,
+       output reg crreply_irq,
+       output reg dmar_irq,
+       output reg dmaw_irq,
+       
+       input down_en,
+       input down_next_frame,
+       output reg down_addr_valid,
+       output reg [19:0] down_addr,
+       output reg down_data_valid,
+       output reg [19:0] down_data,
+
+       input up_en,
+       input up_next_frame,
+       input up_frame_valid,
+       input up_addr_valid,
+       input [19:0] up_addr,
+       input up_data_valid,
+       input [19:0] up_data,
+       
+       output reg dmar_en,
+       output reg [29:0] dmar_addr,
+       output reg [15:0] dmar_remaining,
+       input dmar_next,
+       output reg dmaw_en,
+       output reg [29:0] dmaw_addr,
+       output reg [15:0] dmaw_remaining,
+       input dmaw_next
+);
+
+wire dmar_finished = dmar_remaining == 16'd0;
+reg dmar_finished_r;
+always @(posedge sys_clk) begin
+       if(sys_rst)
+               dmar_finished_r <= 1'b1;
+       else
+               dmar_finished_r <= dmar_finished;
+end
+wire dmaw_finished = dmaw_remaining == 16'd0;
+reg dmaw_finished_r;
+always @(posedge sys_clk) begin
+       if(sys_rst)
+               dmaw_finished_r <= 1'b1;
+       else
+               dmaw_finished_r <= dmaw_finished;
+end
+
+wire csr_selected = csr_a[13:10] == csr_addr;
+
+reg request_en;
+reg request_write;
+reg [6:0] request_addr;
+reg [15:0] request_data;
+reg [15:0] reply_data;
+always @(posedge sys_clk) begin
+       if(sys_rst) begin
+               csr_do <= 32'd0;
+               request_en <= 1'b0;
+               request_write <= 1'b0;
+               request_addr <= 7'd0;
+               request_data <= 16'd0;
+               
+               down_addr_valid <= 1'b0;
+               down_data_valid <= 1'b0;
+               
+               dmar_en <= 1'b0;
+               dmar_addr <= 30'd0;
+               dmar_remaining <= 16'd0;
+               dmaw_en <= 1'b0;
+               dmaw_addr <= 30'd0;
+               dmaw_remaining <= 16'd0;
+               
+               crrequest_irq <= 1'b0;
+               crreply_irq <= 1'b0;
+               dmar_irq <= 1'b0;
+               dmaw_irq <= 1'b0;
+       end else begin
+               if(down_en & down_next_frame) begin
+                       down_addr_valid <= request_en;
+                       down_addr <= {~request_write, request_addr, 12'd0};
+                       down_data_valid <= request_en & request_write;
+                       down_data <= {request_data, 4'd0};
+                       
+                       request_en <= 1'b0;
+                       if(request_en)
+                               crrequest_irq <= 1'b1;
+               end
+               if(up_en & up_next_frame) begin
+                       if(up_frame_valid & up_addr_valid & up_data_valid) begin
+                               crreply_irq <= 1'b1;
+                               reply_data <= up_data[19:4];
+                       end
+               end
+               
+               if(dmar_next) begin
+                       dmar_addr <= dmar_addr + 30'd1;
+                       dmar_remaining <= dmar_remaining - 16'd1;
+               end
+               if(dmaw_next) begin
+                       dmaw_addr <= dmaw_addr + 30'd1;
+                       dmaw_remaining <= dmaw_remaining - 16'd1;
+               end
+               
+               if(dmar_finished & ~dmar_finished_r)
+                       dmar_irq <= 1'b1;
+               if(dmaw_finished & ~dmaw_finished_r)
+                       dmaw_irq <= 1'b1;
+       
+               csr_do <= 32'd0;
+               if(csr_selected) begin
+                       if(csr_we) begin
+                               case(csr_a[3:0])
+                                       /* Codec register access */
+                                       4'b0000: begin
+                                               request_en <= csr_di[0];
+                                               request_write <= csr_di[1];
+                                               if(csr_di[2])
+                                                       crrequest_irq <= 1'b0;
+                                               if(csr_di[3])
+                                                       crreply_irq <= 1'b0;
+                                       end
+                                       4'b0001: request_addr <= csr_di[6:0];
+                                       4'b0010: request_data <= csr_di[15:0];
+                                       // Reply Data is read-only
+                                       
+                                       /* Downstream */
+                                       4'b0100: begin
+                                               dmar_en <= csr_di[0];
+                                               dmar_irq <= 1'b0;
+                                       end
+                                       4'b0101: dmar_addr <= csr_di[31:2];
+                                       4'b0110: dmar_remaining <= csr_di[17:2];
+                                       
+                                       /* Upstream */
+                                       4'b1000: begin
+                                               dmaw_en <= csr_di[0];
+                                               dmaw_irq <= 1'b0;
+                                       end
+                                       4'b1001: dmaw_addr <= csr_di[31:2];
+                                       4'b1010: dmaw_remaining <= csr_di[17:2];
+                               endcase
+                       end
+                       case(csr_a[3:0])
+                               /* Codec register access */
+                               4'b0000: csr_do <= {crreply_irq, crrequest_irq, request_write, request_en};
+                               4'b0001: csr_do <= request_addr;
+                               4'b0010: csr_do <= request_data;
+                               4'b0011: csr_do <= reply_data;
+                               
+                               /* Downstream */
+                               4'b0100: csr_do <= {dmar_irq, dmar_en};
+                               4'b0101: csr_do <= {dmar_addr, 2'b00};
+                               4'b0110: csr_do <= {dmar_remaining, 2'b00};
+
+                               /* Upstream */
+                               4'b1000: csr_do <= {dmaw_irq, dmaw_en};
+                               4'b1001: csr_do <= {dmaw_addr, 2'b00};
+                               4'b1010: csr_do <= {dmaw_remaining, 2'b00};
+                       endcase
+               end
+       end
+end
+
+endmodule
diff --git a/milkymist-core/cores/ac97/rtl/ac97_deframer.v b/milkymist-core/cores/ac97/rtl/ac97_deframer.v
new file mode 100644 (file)
index 0000000..c897e69
--- /dev/null
@@ -0,0 +1,160 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+module ac97_deframer(
+       input sys_clk,
+       input sys_rst,
+       
+       /* to transceiver */
+       input up_stb,
+       output up_ack,
+       input up_sync,
+       input up_data,
+       
+       /* frame data */
+       input en,
+       output reg next_frame,
+       output reg frame_valid,
+       output reg addr_valid,
+       output reg [19:0] addr,
+       output reg data_valid,
+       output reg [19:0] data,
+       output reg pcmleft_valid,
+       output reg [19:0] pcmleft,
+       output reg pcmright_valid,
+       output reg [19:0] pcmright
+);
+
+reg [7:0] bitcounter;
+reg sync_old;
+always @(posedge sys_clk) begin
+       if(sys_rst) begin
+               bitcounter <= 8'd253;
+               next_frame <= 1'b0;
+               sync_old <= 1'b0;
+       end else begin
+               if(en)
+                       next_frame <= 1'b0;
+               if(up_stb & en) begin
+                       case(bitcounter)
+                               8'd0: frame_valid <= up_data;           // Frame valid
+                               8'd1: addr_valid <= up_data;            // Slot 1 valid
+                               8'd2: data_valid <= up_data;            // Slot 2 valid
+                               8'd3: pcmleft_valid <= up_data;         // Slot 3 valid
+                               8'd4: pcmright_valid <= up_data;        // Slot 4 valid
+       
+                               8'd16: addr[19] <= up_data;
+                               8'd17: addr[18] <= up_data;
+                               8'd18: addr[17] <= up_data;
+                               8'd19: addr[16] <= up_data;
+                               8'd20: addr[15] <= up_data;
+                               8'd21: addr[14] <= up_data;
+                               8'd22: addr[13] <= up_data;
+                               8'd23: addr[12] <= up_data;
+                               8'd24: addr[11] <= up_data;
+                               8'd25: addr[10] <= up_data;
+                               8'd26: addr[9] <= up_data;
+                               8'd27: addr[8] <= up_data;
+                               8'd28: addr[7] <= up_data;
+                               8'd29: addr[6] <= up_data;
+                               8'd30: addr[5] <= up_data;
+                               8'd31: addr[4] <= up_data;
+                               8'd32: addr[3] <= up_data;
+                               8'd33: addr[2] <= up_data;
+                               8'd34: addr[1] <= up_data;
+                               8'd35: addr[0] <= up_data;
+                               
+                               8'd36: data[19] <= up_data;
+                               8'd37: data[18] <= up_data;
+                               8'd38: data[17] <= up_data;
+                               8'd39: data[16] <= up_data;
+                               8'd40: data[15] <= up_data;
+                               8'd41: data[14] <= up_data;
+                               8'd42: data[13] <= up_data;
+                               8'd43: data[12] <= up_data;
+                               8'd44: data[11] <= up_data;
+                               8'd45: data[10] <= up_data;
+                               8'd46: data[9] <= up_data;
+                               8'd47: data[8] <= up_data;
+                               8'd48: data[7] <= up_data;
+                               8'd49: data[6] <= up_data;
+                               8'd50: data[5] <= up_data;
+                               8'd51: data[4] <= up_data;
+                               8'd52: data[3] <= up_data;
+                               8'd53: data[2] <= up_data;
+                               8'd54: data[1] <= up_data;
+                               8'd55: data[0] <= up_data;
+                               
+                               8'd56: pcmleft[19] <= up_data;
+                               8'd57: pcmleft[18] <= up_data;
+                               8'd58: pcmleft[17] <= up_data;
+                               8'd59: pcmleft[16] <= up_data;
+                               8'd60: pcmleft[15] <= up_data;
+                               8'd61: pcmleft[14] <= up_data;
+                               8'd62: pcmleft[13] <= up_data;
+                               8'd63: pcmleft[12] <= up_data;
+                               8'd64: pcmleft[11] <= up_data;
+                               8'd65: pcmleft[10] <= up_data;
+                               8'd66: pcmleft[9] <= up_data;
+                               8'd67: pcmleft[8] <= up_data;
+                               8'd68: pcmleft[7] <= up_data;
+                               8'd69: pcmleft[6] <= up_data;
+                               8'd70: pcmleft[5] <= up_data;
+                               8'd71: pcmleft[4] <= up_data;
+                               8'd72: pcmleft[3] <= up_data;
+                               8'd73: pcmleft[2] <= up_data;
+                               8'd74: pcmleft[1] <= up_data;
+                               8'd75: pcmleft[0] <= up_data;
+                               
+                               8'd76: pcmright[19] <= up_data;
+                               8'd77: pcmright[18] <= up_data;
+                               8'd78: pcmright[17] <= up_data;
+                               8'd79: pcmright[16] <= up_data;
+                               8'd80: pcmright[15] <= up_data;
+                               8'd81: pcmright[14] <= up_data;
+                               8'd82: pcmright[13] <= up_data;
+                               8'd83: pcmright[12] <= up_data;
+                               8'd84: pcmright[11] <= up_data;
+                               8'd85: pcmright[10] <= up_data;
+                               8'd86: pcmright[9] <= up_data;
+                               8'd87: pcmright[8] <= up_data;
+                               8'd88: pcmright[7] <= up_data;
+                               8'd89: pcmright[6] <= up_data;
+                               8'd90: pcmright[5] <= up_data;
+                               8'd91: pcmright[4] <= up_data;
+                               8'd92: pcmright[3] <= up_data;
+                               8'd93: pcmright[2] <= up_data;
+                               8'd94: pcmright[1] <= up_data;
+                               8'd95: pcmright[0] <= up_data;
+                       endcase
+                       
+                       if(bitcounter == 8'd95)
+                               next_frame <= 1'b1;
+                       
+                       sync_old <= up_sync;
+                       if(up_sync & ~sync_old)
+                               bitcounter <= 8'd0;
+                       else
+                               bitcounter <= bitcounter + 8'd1;
+               end
+       end
+end
+
+assign up_ack = en;
+
+endmodule
diff --git a/milkymist-core/cores/ac97/rtl/ac97_dma.v b/milkymist-core/cores/ac97/rtl/ac97_dma.v
new file mode 100644 (file)
index 0000000..4c3cccf
--- /dev/null
@@ -0,0 +1,173 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+module ac97_dma(
+       input sys_rst,
+       input sys_clk,
+       
+       output reg [31:0] wbm_adr_o,
+       output [2:0] wbm_cti_o,
+       output reg wbm_we_o,
+       output wbm_cyc_o,
+       output wbm_stb_o,
+       input wbm_ack_i,
+       input [31:0] wbm_dat_i,
+       output [31:0] wbm_dat_o,
+       
+       output reg down_en,
+       input down_next_frame,
+       output reg down_pcmleft_valid,
+       output reg [19:0] down_pcmleft,
+       output reg down_pcmright_valid,
+       output reg [19:0] down_pcmright,
+       
+       output reg up_en,
+       input up_next_frame,
+       input up_frame_valid,
+       input up_pcmleft_valid,
+       input [19:0] up_pcmleft,
+       input up_pcmright_valid,
+       input [19:0] up_pcmright,
+       
+       /* in 32-bit words */
+       input dmar_en,
+       input [29:0] dmar_addr,
+       input [15:0] dmar_remaining,
+       output reg dmar_next,
+       input dmaw_en,
+       input [29:0] dmaw_addr,
+       input [15:0] dmaw_remaining,
+       output reg dmaw_next
+);
+
+assign wbm_cti_o = 3'd0;
+
+reg wbm_strobe;
+assign wbm_cyc_o = wbm_strobe;
+assign wbm_stb_o = wbm_strobe;
+
+reg load_read_addr;
+reg load_write_addr;
+always @(posedge sys_clk) begin
+       if(load_read_addr)
+               wbm_adr_o <= {dmar_addr, 2'b00};
+       else if(load_write_addr)
+               wbm_adr_o <= {dmaw_addr, 2'b00};
+end
+
+reg load_downpcm;
+always @(posedge sys_clk) begin
+       if(load_downpcm) begin
+               down_pcmleft_valid <= dmar_en;
+               down_pcmright_valid <= dmar_en;
+               down_pcmleft <= {wbm_dat_i[31:16], wbm_dat_i[30:27]};
+               down_pcmright <= {wbm_dat_i[15:0], wbm_dat_i[14:11]};
+       end
+end
+
+assign wbm_dat_o = {up_pcmleft[19:4], up_pcmright[19:4]};
+
+reg [2:0] state;
+reg [2:0] next_state;
+
+parameter IDLE         = 3'd0;
+parameter DMAR         = 3'd1;
+parameter DMAW         = 3'd2;
+parameter NEXTDFRAME   = 3'd3;
+parameter NEXTUFRAME   = 3'd4;
+
+wire dmar_finished = dmar_remaining == 16'd0;
+wire dmaw_finished = dmaw_remaining == 16'd0;
+
+always @(posedge sys_clk) begin
+       if(sys_rst)
+               state <= IDLE;
+       else
+               state <= next_state;
+       //$display("state:%d->%d %b %b %b", state, next_state, down_next_frame, dmar_en, ~dmar_finished);
+end
+
+always @(*) begin
+       next_state = state;
+
+       wbm_strobe = 1'b0;
+       load_read_addr = 1'b0;
+       load_write_addr = 1'b0;
+       wbm_we_o = 1'b0;
+       down_en = 1'b0;
+       up_en = 1'b0;
+       
+       dmar_next = 1'b0;
+       dmaw_next = 1'b0;
+       
+       load_downpcm = 1'b0;
+       
+       case(state)
+               IDLE: begin
+                       down_en = 1'b1;
+                       up_en = 1'b1;
+                       
+                       if(down_next_frame) begin
+                               if(dmar_en)
+                                       down_en = 1'b0;
+                               else
+                                       load_downpcm = 1'b1;
+                       end
+                       if(up_next_frame) begin
+                               if(dmaw_en)
+                                       up_en = 1'b0;
+                               else
+                                       load_downpcm = 1'b1;
+                       end
+                       
+                       if(down_next_frame & dmar_en & ~dmar_finished) begin
+                               load_read_addr = 1'b1;
+                               next_state = DMAR;
+                       end else if(up_next_frame & dmaw_en & ~dmaw_finished) begin
+                               load_write_addr = 1'b1;
+                               next_state = DMAW;
+                       end
+               end
+               DMAR: begin
+                       wbm_strobe = 1'b1;
+                       load_downpcm = 1'b1;
+                       if(wbm_ack_i) begin
+                               dmar_next = 1'b1;
+                               next_state = NEXTDFRAME;
+                       end
+               end
+               DMAW: begin
+                       wbm_strobe = 1'b1;
+                       wbm_we_o = 1'b1;
+                       if(wbm_ack_i) begin
+                               dmaw_next = 1'b1;
+                               next_state = NEXTUFRAME;
+                       end
+               end
+               NEXTDFRAME: begin
+                       down_en = 1'b1;
+                       next_state = IDLE;
+               end
+               NEXTUFRAME: begin
+                       up_en = 1'b1;
+                       next_state = IDLE;
+               end
+       endcase
+end
+
+endmodule
diff --git a/milkymist-core/cores/ac97/rtl/ac97_framer.v b/milkymist-core/cores/ac97/rtl/ac97_framer.v
new file mode 100644 (file)
index 0000000..b738a34
--- /dev/null
@@ -0,0 +1,185 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+module ac97_framer(
+       input sys_clk,
+       input sys_rst,
+       
+       /* to transceiver */
+       input down_ready,
+       output down_stb,
+       output reg down_sync,
+       output reg down_data,
+       
+       /* frame data */
+       input en,
+       output reg next_frame,
+       input addr_valid,
+       input [19:0] addr,
+       input data_valid,
+       input [19:0] data,
+       input pcmleft_valid,
+       input [19:0] pcmleft,
+       input pcmright_valid,
+       input [19:0] pcmright
+);
+
+reg [7:0] bitcounter;
+
+reg slot_bit;
+always @(*) begin
+       case(bitcounter)
+               8'd16: slot_bit = addr[19];
+               8'd17: slot_bit = addr[18];
+               8'd18: slot_bit = addr[17];
+               8'd19: slot_bit = addr[16];
+               8'd20: slot_bit = addr[15];
+               8'd21: slot_bit = addr[14];
+               8'd22: slot_bit = addr[13];
+               8'd23: slot_bit = addr[12];
+               8'd24: slot_bit = addr[11];
+               8'd25: slot_bit = addr[10];
+               8'd26: slot_bit = addr[9];
+               8'd27: slot_bit = addr[8];
+               8'd28: slot_bit = addr[7];
+               8'd29: slot_bit = addr[6];
+               8'd30: slot_bit = addr[5];
+               8'd31: slot_bit = addr[4];
+               8'd32: slot_bit = addr[3];
+               8'd33: slot_bit = addr[2];
+               8'd34: slot_bit = addr[1];
+               8'd35: slot_bit = addr[0];
+               
+               8'd36: slot_bit = data[19];
+               8'd37: slot_bit = data[18];
+               8'd38: slot_bit = data[17];
+               8'd39: slot_bit = data[16];
+               8'd40: slot_bit = data[15];
+               8'd41: slot_bit = data[14];
+               8'd42: slot_bit = data[13];
+               8'd43: slot_bit = data[12];
+               8'd44: slot_bit = data[11];
+               8'd45: slot_bit = data[10];
+               8'd46: slot_bit = data[9];
+               8'd47: slot_bit = data[8];
+               8'd48: slot_bit = data[7];
+               8'd49: slot_bit = data[6];
+               8'd50: slot_bit = data[5];
+               8'd51: slot_bit = data[4];
+               8'd52: slot_bit = data[3];
+               8'd53: slot_bit = data[2];
+               8'd54: slot_bit = data[1];
+               8'd55: slot_bit = data[0];
+               
+               8'd56: slot_bit = pcmleft[19];
+               8'd57: slot_bit = pcmleft[18];
+               8'd58: slot_bit = pcmleft[17];
+               8'd59: slot_bit = pcmleft[16];
+               8'd60: slot_bit = pcmleft[15];
+               8'd61: slot_bit = pcmleft[14];
+               8'd62: slot_bit = pcmleft[13];
+               8'd63: slot_bit = pcmleft[12];
+               8'd64: slot_bit = pcmleft[11];
+               8'd65: slot_bit = pcmleft[10];
+               8'd66: slot_bit = pcmleft[9];
+               8'd67: slot_bit = pcmleft[8];
+               8'd68: slot_bit = pcmleft[7];
+               8'd69: slot_bit = pcmleft[6];
+               8'd70: slot_bit = pcmleft[5];
+               8'd71: slot_bit = pcmleft[4];
+               8'd72: slot_bit = pcmleft[3];
+               8'd73: slot_bit = pcmleft[2];
+               8'd74: slot_bit = pcmleft[1];
+               8'd75: slot_bit = pcmleft[0];
+               
+               8'd76: slot_bit = pcmright[19];
+               8'd77: slot_bit = pcmright[18];
+               8'd78: slot_bit = pcmright[17];
+               8'd79: slot_bit = pcmright[16];
+               8'd80: slot_bit = pcmright[15];
+               8'd81: slot_bit = pcmright[14];
+               8'd82: slot_bit = pcmright[13];
+               8'd83: slot_bit = pcmright[12];
+               8'd84: slot_bit = pcmright[11];
+               8'd85: slot_bit = pcmright[10];
+               8'd86: slot_bit = pcmright[9];
+               8'd87: slot_bit = pcmright[8];
+               8'd88: slot_bit = pcmright[7];
+               8'd89: slot_bit = pcmright[6];
+               8'd90: slot_bit = pcmright[5];
+               8'd91: slot_bit = pcmright[4];
+               8'd92: slot_bit = pcmright[3];
+               8'd93: slot_bit = pcmright[2];
+               8'd94: slot_bit = pcmright[1];
+               8'd95: slot_bit = pcmright[0];
+               default: slot_bit = 1'bx;
+       endcase
+end
+
+reg in_slot;
+
+always @(posedge sys_clk) begin
+       if(sys_rst) begin
+               bitcounter <= 8'd0;
+               down_sync <= 1'b0;
+               down_data <= 1'b0;
+               in_slot <= 1'b0;
+       end else begin
+               if(en)
+                       next_frame <= 1'b0;
+               if(down_ready & en) begin
+                       if(bitcounter == 8'd255)
+                               next_frame <= 1'b1;
+                       
+                       if(bitcounter == 8'd255)
+                               down_sync <= 1'b1;
+                       if(bitcounter == 8'd15)
+                               down_sync <= 1'b0;
+                       
+                       if(bitcounter == 8'd15)
+                               in_slot <= 1'b1;
+                       if(bitcounter == 8'd95)
+                               in_slot <= 1'b0;
+                       
+                       case({down_sync, in_slot})
+                               2'b10: begin
+                                       /* Tag */
+                                       case(bitcounter[3:0])
+                                               4'h0: down_data <= 1'b1;                // Frame valid
+                                               4'h1: down_data <= addr_valid;          // Slot 1 valid
+                                               4'h2: down_data <= data_valid;          // Slot 2 valid
+                                               4'h3: down_data <= pcmleft_valid;       // Slot 3 valid
+                                               4'h4: down_data <= pcmright_valid;      // Slot 4 valid
+                                               default: down_data <= 1'b0;
+                                       endcase
+                                       //$display("PCMRIGHT_V: %b", pcmright_valid);
+                               end
+                               2'b01:
+                                       /* Active slot */
+                                       down_data <= slot_bit;
+                               default: down_data <= 1'b0;
+                       endcase
+                       
+                       bitcounter <= bitcounter + 8'd1;
+               end
+       end
+end
+
+assign down_stb = en;
+
+endmodule
diff --git a/milkymist-core/cores/ac97/rtl/ac97_graycounter.v b/milkymist-core/cores/ac97/rtl/ac97_graycounter.v
new file mode 100644 (file)
index 0000000..2d9dbd0
--- /dev/null
@@ -0,0 +1,35 @@
+//==========================================
+// Function : Code Gray counter.
+// Coder    : Alex Claros F.
+// Date     : 15/May/2005.
+//=======================================
+
+`timescale 1ns/1ps
+
+module ac97_graycounter
+   #(parameter   COUNTER_WIDTH = 2)
+   
+    (output reg  [COUNTER_WIDTH-1:0]    GrayCount_out,  //'Gray' code count output.
+    
+     input wire                         Enable_in,  //Count enable.
+     input wire                         Clear_in,   //Count reset.
+    
+     input wire                         Clk);
+
+    /////////Internal connections & variables///////
+    reg    [COUNTER_WIDTH-1:0]         BinaryCount;
+
+    /////////Code///////////////////////
+    
+    always @ (posedge Clk)
+        if (Clear_in) begin
+            BinaryCount   <= {COUNTER_WIDTH{1'b 0}} + 1;  //Gray count begins @ '1' with
+            GrayCount_out <= {COUNTER_WIDTH{1'b 0}};      // first 'Enable_in'.
+        end
+        else if (Enable_in) begin
+            BinaryCount   <= BinaryCount + 1;
+            GrayCount_out <= {BinaryCount[COUNTER_WIDTH-1],
+                              BinaryCount[COUNTER_WIDTH-2:0] ^ BinaryCount[COUNTER_WIDTH-1:1]};
+        end
+
+endmodule
diff --git a/milkymist-core/cores/ac97/rtl/ac97_transceiver.v b/milkymist-core/cores/ac97/rtl/ac97_transceiver.v
new file mode 100644 (file)
index 0000000..1a72d93
--- /dev/null
@@ -0,0 +1,107 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+module ac97_transceiver(
+       input sys_clk,
+       input sys_rst,
+       input ac97_clk,
+       input ac97_rst_n,
+       
+       /* to codec */
+       input ac97_sin,
+       output reg ac97_sout,
+       output reg ac97_sync,
+       
+       /* to system, upstream */
+       output up_stb,
+       input up_ack,
+       output up_sync,
+       output up_data,
+       
+       /* to system, downstream */
+       output down_ready,
+       input down_stb,
+       input down_sync,
+       input down_data
+);
+
+/* Upstream */
+reg ac97_sin_r;
+always @(negedge ac97_clk) ac97_sin_r <= ac97_sin;
+
+reg ac97_syncfb_r;
+always @(negedge ac97_clk) ac97_syncfb_r <= ac97_sync;
+
+wire up_empty;
+ac97_asfifo #(
+       .DATA_WIDTH(2),
+       .ADDRESS_WIDTH(6)
+) up_fifo (
+       .Data_out({up_sync, up_data}),
+       .Empty_out(up_empty),
+       .ReadEn_in(up_ack),
+       .RClk(sys_clk),
+       
+       .Data_in({ac97_syncfb_r, ac97_sin_r}),
+       .Full_out(),
+       .WriteEn_in(1'b1),
+       .WClk(~ac97_clk),
+       
+       .Clear_in(sys_rst)
+);
+assign up_stb = ~up_empty;
+
+/* Downstream */
+
+/* Set SOUT and SYNC to 0 during RESET to avoid ATE/Test Mode */
+wire ac97_sync_r;
+always @(negedge ac97_rst_n, posedge ac97_clk) begin
+       if(~ac97_rst_n)
+               ac97_sync <= 1'b0;
+       else
+               ac97_sync <= ac97_sync_r;
+end
+
+wire ac97_sout_r;
+always @(negedge ac97_rst_n, posedge ac97_clk) begin
+       if(~ac97_rst_n)
+               ac97_sout <= 1'b0;
+       else
+               ac97_sout <= ac97_sout_r;
+end
+
+wire down_full;
+ac97_asfifo #(
+       .DATA_WIDTH(2),
+       .ADDRESS_WIDTH(6)
+) down_fifo (
+       .Data_out({ac97_sync_r, ac97_sout_r}),
+       .Empty_out(),
+       .ReadEn_in(1'b1),
+       .RClk(ac97_clk),
+       
+       .Data_in({down_sync, down_data}),
+       .Full_out(down_full),
+       .WriteEn_in(down_stb),
+       .WClk(sys_clk),
+       
+       .Clear_in(sys_rst)
+);
+assign down_ready = ~down_full;
+
+endmodule
diff --git a/milkymist-core/cores/ac97/test/Makefile b/milkymist-core/cores/ac97/test/Makefile
new file mode 100644 (file)
index 0000000..dccf650
--- /dev/null
@@ -0,0 +1,11 @@
+SOURCES=tb_ac97.v $(wildcard ../rtl/*.v)
+
+all: sim
+
+sim: $(SOURCES)
+       cver $(SOURCES)
+
+clean:
+       rm -f verilog.log ac97.vcd
+
+.PHONY: clean sim
diff --git a/milkymist-core/cores/ac97/test/tb_ac97.v b/milkymist-core/cores/ac97/test/tb_ac97.v
new file mode 100644 (file)
index 0000000..49fca08
--- /dev/null
@@ -0,0 +1,147 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+`timescale 1ns/1ps
+
+module tb_ac97();
+
+reg sys_clk;
+reg sys_rst;
+reg ac97_clk;
+reg ac97_rst_n;
+
+initial begin
+       sys_clk = 1'b0;
+       ac97_clk = 1'b0;
+end
+always #5 sys_clk <= ~sys_clk;
+always #40 ac97_clk <= ~ac97_clk;
+
+reg [13:0] csr_a;
+reg csr_we;
+reg [31:0] csr_di;
+
+wire [31:0] wbm_adr_o;
+wire wbm_we_o;
+wire wbm_stb_o;
+reg wbm_ack_i;
+reg [31:0] wbm_dat_i;
+wire [31:0] wbm_dat_o;
+
+wire dat;
+ac97 dut(
+       .sys_clk(sys_clk),
+       .sys_rst(sys_rst),
+       .ac97_clk(ac97_clk),
+       .ac97_rst_n(ac97_rst_n),
+       
+       .ac97_sin(dat),
+       .ac97_sout(dat),
+       .ac97_sync(),
+       
+       .csr_a(csr_a),
+       .csr_we(csr_we),
+       .csr_di(csr_di),
+       .csr_do(csr_do),
+       
+       .cr_irq(),
+       .dmar_irq(),
+       .dmaw_irq(),
+       
+       .wbm_adr_o(wbm_adr_o),
+       .wbm_cti_o(),
+       .wbm_we_o(wbm_we_o),
+       .wbm_cyc_o(),
+       .wbm_stb_o(wbm_stb_o),
+       .wbm_ack_i(wbm_ack_i),
+       .wbm_dat_i(wbm_dat_i),
+       .wbm_sel_o(),
+       .wbm_dat_o(wbm_dat_o)
+);
+
+always @(posedge sys_clk) begin
+       if(wbm_stb_o & ~wbm_ack_i) begin
+               wbm_ack_i <= 1'b1;
+               if(wbm_we_o) begin
+                       $display("WB WRITE at addr %x, dat %x", wbm_adr_o, wbm_dat_o);
+               end else begin
+                       wbm_dat_i = wbm_adr_o;
+                       $display("WB READ at addr %x, dat %x", wbm_adr_o, wbm_dat_i);
+               end
+       end else
+               wbm_ack_i <= 1'b0;
+end
+
+task waitclock;
+begin
+       @(posedge sys_clk);
+       #1;
+end
+endtask
+
+task csrwrite;
+input [31:0] address;
+input [31:0] data;
+begin
+       csr_a = address[16:2];
+       csr_di = data;
+       csr_we = 1'b1;
+       waitclock;
+       $display("Configuration Write: %x=%x", address, data);
+       csr_we = 1'b0;
+end
+endtask
+
+task csrread;
+input [31:0] address;
+begin
+       csr_a = address[16:2];
+       waitclock;
+       $display("Configuration Read : %x=%x", address, csr_do);
+end
+endtask
+
+initial begin
+       $dumpfile("ac97.vcd");
+       $dumpvars(0, dut);
+       ac97_rst_n = 1'b1;
+       sys_rst = 1'b0;
+       wbm_ack_i = 1'b0;
+       #161;
+       ac97_rst_n = 1'b0;
+       sys_rst = 1'b1;
+       #160;
+       ac97_rst_n = 1'b1;
+       sys_rst = 1'b0;
+       #100000;
+       
+       //csrwrite(32'h8, 32'hcafe);
+       //csrwrite(32'h0, 32'h3);
+       //csrread(32'h0);
+       //#100000;
+       //csrread(32'h0);
+       //csrread(32'hc);
+       
+       csrwrite(32'h14, 32'h0);
+       csrwrite(32'h18, 32'd40);
+       csrwrite(32'h10, 32'd1);
+       #500000;
+       $finish;
+end
+
+endmodule
diff --git a/milkymist-core/cores/aceusb/doc/Makefile b/milkymist-core/cores/aceusb/doc/Makefile
new file mode 100644 (file)
index 0000000..9925ec9
--- /dev/null
@@ -0,0 +1,23 @@
+TEX=aceusb.tex
+
+DVI=$(TEX:.tex=.dvi)
+PS=$(TEX:.tex=.ps)
+PDF=$(TEX:.tex=.pdf)
+AUX=$(TEX:.tex=.aux)
+LOG=$(TEX:.tex=.log)
+
+all: $(PDF)
+
+%.dvi: %.tex
+       latex $<
+
+%.ps: %.dvi
+       dvips $<
+
+%.pdf: %.ps
+       ps2pdf $<
+
+clean:
+       rm -f $(DVI) $(PS) $(PDF) $(AUX) $(LOG)
+
+.PHONY: clean
diff --git a/milkymist-core/cores/aceusb/doc/aceusb.tex b/milkymist-core/cores/aceusb/doc/aceusb.tex
new file mode 100644 (file)
index 0000000..8162744
--- /dev/null
@@ -0,0 +1,34 @@
+\documentclass[a4paper,11pt]{article}
+\usepackage{fullpage}
+\usepackage[latin1]{inputenc}
+\usepackage[T1]{fontenc}
+\usepackage[normalem]{ulem}
+\usepackage[english]{babel}
+\usepackage{listings,babel}
+\lstset{breaklines=true,basicstyle=\ttfamily}
+\usepackage{graphicx}
+\usepackage{moreverb}
+\usepackage{url}
+
+\title{WISHBONE to SystemACE MPU + CY7C67300 bridge}
+\author{S\'ebastien Bourdeauducq}
+\date{\today}
+\begin{document}
+\maketitle{}
+\section{Specifications}
+This IP core is designed to allow a WISHBONE interface to access the bus with the SystemACE MPU interface and the CY7C67300 USB chip on the ML401 development board. The SystemACE chip must be used to access the CF card slot of the board.
+
+It maps the registers of these chips to the WISHBONE address space, and handles resynchronizing the signals between the WISHBONE and the on-board 30MHz clock domains.
+
+Accent has been put on simplicity and low resource usage rather than performance. With a 100MHz WISHBONE clock, the write latency is typically 10 cycles, and the read latency 14 cycles.
+
+Currently, the core only supports talking to the SystemACE chip. It will disable the USB chip. The 16-bit SystemACE registers are mapped to the WISHBONE bus, with each register expanded to 32 bits (the 16 most significant bits are always zero).
+
+The SystemACE registers are documented in Xilinx datasheet DS080.
+
+\section{Using the core}
+Connecting the core is very simple. The WISHBONE signals are standard, and the other signals should go the the FPGA pads.
+
+Only attention should be paid to the clock signal. It must be generated externally (with the on-board oscillator on the ML401) and is an input to the core, and also to the FPGA in the ML401 case.
+
+\end{document}
diff --git a/milkymist-core/cores/aceusb/doc/ds080.pdf b/milkymist-core/cores/aceusb/doc/ds080.pdf
new file mode 100644 (file)
index 0000000..49a61c3
Binary files /dev/null and b/milkymist-core/cores/aceusb/doc/ds080.pdf differ
diff --git a/milkymist-core/cores/aceusb/rtl/aceusb.v b/milkymist-core/cores/aceusb/rtl/aceusb.v
new file mode 100644 (file)
index 0000000..54ec255
--- /dev/null
@@ -0,0 +1,161 @@
+/*
+ * Milkymist VJ SoC
+ * Copyright (C) 2007, 2008, 2009 Sebastien Bourdeauducq
+ *
+ * This program is free and excepted software; you can use it, redistribute it
+ * and/or modify it under the terms of the Exception General Public License as
+ * published by the Exception License Foundation; either version 2 of the
+ * License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
+ * FOR A PARTICULAR PURPOSE. See the Exception General Public License for more
+ * details.
+ *
+ * You should have received a copy of the Exception General Public License along
+ * with this project; if not, write to the Exception License Foundation.
+ */
+
+module aceusb(
+       /* WISHBONE interface */
+       input sys_clk,
+       input sys_rst,
+       
+       input [31:0] wb_adr_i,
+       input [31:0] wb_dat_i,
+       output [31:0] wb_dat_o,
+       input wb_cyc_i,
+       input wb_stb_i,
+