ES IRQ on PFPU+TMU
authorlekernel <sebastien.bourdeauducq@lekernel.net>
Fri, 13 Nov 2009 20:13:51 +0000 (21:13 +0100)
committerlekernel <sebastien.bourdeauducq@lekernel.net>
Fri, 13 Nov 2009 20:13:51 +0000 (21:13 +0100)
cores/pfpu/rtl/pfpu_ctlif.v
cores/tmu/rtl/tmu_ctlif.v
software/demo/main.c
software/include/hw/pfpu.h
software/include/hw/tmu.h
software/libhal/pfpu.c
software/libhal/tmu.c

index c8cc6fc..8ac795a 100644 (file)
@@ -65,8 +65,6 @@ always @(posedge sys_clk) begin
                old_busy <= busy;
 end
 
-wire trigger_irq = old_busy & ~busy;
-
 reg [13:0] vertex_counter;
 reg [10:0] collision_counter;
 reg [10:0] stray_counter;
@@ -96,7 +94,7 @@ always @(posedge sys_clk) begin
                collision_counter <= 11'd0;
                stray_counter <= 11'd0;
        end else begin
-               if(trigger_irq) irq <= 1'b1;
+               irq <= old_busy & ~busy;
 
                if(vnext) vertex_counter <= vertex_counter + 14'd1;
                if(err_collision) collision_counter <= collision_counter + 11'd1;
@@ -110,7 +108,7 @@ always @(posedge sys_clk) begin
 
                /* Read control registers */
                case(csr_a[3:0])
-                       4'b0000: csr_do_r <= {irq, busy};
+                       4'b0000: csr_do_r <= busy;
 
                        4'b0001: csr_do_r <= {dma_base, 2'b00};
                        4'b0010: csr_do_r <= hmesh_last;
@@ -144,7 +142,6 @@ always @(posedge sys_clk) begin
                                case(csr_a[2:0])
                                        3'b000: begin
                                                start <= csr_di[0];
-                                               irq <= 1'b0;
 
                                                vertex_counter <= 14'd0;
                                                collision_counter <= 11'd0;
index 4ad36f8..b8af36a 100644 (file)
@@ -66,8 +66,6 @@ always @(posedge sys_clk) begin
                old_busy <= busy;
 end
 
-wire trigger_irq = old_busy & ~busy;
-
 wire csr_selected = csr_a[13:10] == csr_addr;
 
 always @(posedge sys_clk) begin
@@ -93,7 +91,7 @@ always @(posedge sys_clk) begin
                dst_hres <= 11'd640;
                dst_vres <= 11'd480;
        end else begin
-               if(trigger_irq) irq <= 1'b1;
+               irq <= old_busy & ~busy;
                
                csr_do <= 32'd0;
                start <= 1'b0;
@@ -102,8 +100,7 @@ always @(posedge sys_clk) begin
                                case(csr_a[3:0])
                                        4'b0000: begin
                                                start <= csr_di[0];
-                                               irq <= 1'b0;
-                                               chroma_key_en <= csr_di[2];
+                                               chroma_key_en <= csr_di[1];
                                        end
 
                                        4'b0001: hmesh_last <= csr_di[6:0];
@@ -125,7 +122,7 @@ always @(posedge sys_clk) begin
                                endcase
                        end
                        case(csr_a[4:0])
-                               5'b00000: csr_do <= {chroma_key_en, irq, busy};
+                               5'b00000: csr_do <= {chroma_key_en, busy};
                                
                                5'b00001: csr_do <= hmesh_last;
                                5'b00010: csr_do <= vmesh_last;
index c1233df..1f04894 100644 (file)
@@ -65,11 +65,11 @@ int main()
        mem_init();
        vga_init();
        snd_init();
-       //pfpu_init();
-       //tmu_init();
-       //renderer_init();
-       //apipe_init();
-       //rpipe_init();
+       pfpu_init();
+       tmu_init();
+       renderer_init();
+       apipe_init();
+       rpipe_init();
        slowout_init();
        hdlcd_init();
        ps2_init();
index ffd3c32..6cbdf35 100644 (file)
@@ -23,7 +23,6 @@
 #define CSR_PFPU_CTL           MMPTR(0x80005000)
 #define PFPU_CTL_START         0x01
 #define PFPU_CTL_BUSY          0x01
-#define PFPU_CTL_IRQ           0x02
 
 #define CSR_PFPU_MESHBASE      MMPTR(0x80005004)
 #define CSR_PFPU_HMESHLAST     MMPTR(0x80005008)
index 7c463bc..dd523fc 100644 (file)
@@ -23,8 +23,7 @@
 #define CSR_TMU_CTL            MMPTR(0x80006000)
 #define TMU_CTL_START          0x01
 #define TMU_CTL_BUSY           0x01
-#define TMU_CTL_IRQ            0x02
-#define TMU_CTL_CHROMAKEY      0x04
+#define TMU_CTL_CHROMAKEY      0x02
 
 #define CSR_TMU_HMESHLAST      MMPTR(0x80006004)
 #define CSR_TMU_VMESHLAST      MMPTR(0x80006008)
index d5b51c4..23c0fd5 100644 (file)
@@ -102,7 +102,6 @@ static void pfpu_start(struct pfpu_td *td)
 
 void pfpu_isr()
 {
-       irq_ack(IRQ_PFPU);
        if(queue[consume]->update)
                update_registers(queue[consume]->registers);
        if(queue[consume]->invalidate) {
@@ -114,12 +113,13 @@ void pfpu_isr()
        queue[consume]->callback(queue[consume]);
        consume = (consume + 1) & PFPU_TASKQ_MASK;
        level--;
+
+       irq_ack(IRQ_PFPU);
+
        if(level > 0)
-               pfpu_start(queue[consume]); /* IRQ automatically acked */
-       else {
+               pfpu_start(queue[consume]);
+       else
                cts = 1;
-               CSR_PFPU_CTL = 0; /* Ack IRQ */
-       }
 }
 
 int pfpu_submit_task(struct pfpu_td *td)
index c91f2f7..9cb84a5 100644 (file)
@@ -73,7 +73,6 @@ static void tmu_start(struct tmu_td *td)
 
 void tmu_isr()
 {
-       irq_ack(IRQ_TMU);
        if(queue[consume]->callback)
                queue[consume]->callback(queue[consume]);
        if(queue[consume]->profile) {
@@ -103,12 +102,13 @@ void tmu_isr()
        }
        consume = (consume + 1) & TMU_TASKQ_MASK;
        level--;
+
+       irq_ack(IRQ_TMU);
+
        if(level > 0)
                tmu_start(queue[consume]); /* IRQ automatically acked */
-       else {
+       else
                cts = 1;
-               CSR_TMU_CTL = 0; /* Ack IRQ */
-       }
 }
 
 int tmu_submit_task(struct tmu_td *td)