Fixed cache coherency
[mw/milkymist.git] / boards / milkymist-one / rtl / vga.v
1 /*
2  * Milkymist VJ SoC
3  * Copyright (C) 2007, 2008, 2009, 2010 Sebastien Bourdeauducq
4  *
5  * This program is free software: you can redistribute it and/or modify
6  * it under the terms of the GNU General Public License as published by
7  * the Free Software Foundation, version 3 of the License.
8  *
9  * This program is distributed in the hope that it will be useful,
10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
12  * GNU General Public License for more details.
13  *
14  * You should have received a copy of the GNU General Public License
15  * along with this program.  If not, see <http://www.gnu.org/licenses/>.
16  */
17
18 `include "setup.v"
19
20 module vga #(
21         parameter csr_addr = 4'h0,
22         parameter fml_depth = 26
23 ) (
24         input sys_clk,
25         input sys_rst,
26         
27         /* Configuration interface */
28         input [13:0] csr_a,
29         input csr_we,
30         input [31:0] csr_di,
31         output [31:0] csr_do,
32         
33         /* Framebuffer FML 4x64 interface */
34         output [fml_depth-1:0] fml_adr,
35         output fml_stb,
36         input fml_ack,
37         input [63:0] fml_di,
38
39         /* Direct Cache Bus */
40         output dcb_stb,
41         output [fml_depth-1:0] dcb_adr,
42         input [63:0] dcb_dat,
43         input dcb_hit,
44         
45         /* VGA pads */
46         output vga_psave_n,
47         output vga_hsync_n,
48         output vga_vsync_n,
49         output [7:0] vga_r,
50         output [7:0] vga_g,
51         output [7:0] vga_b,
52         output vga_clk
53 );
54
55 wire vga_iclk_dcm;
56 wire vga_iclk_n_dcm;
57 wire vga_iclk;
58 wire vga_iclk_n;
59
60 DCM_SP #(
61         .CLKDV_DIVIDE(1.5),             // 1.5,2.0,2.5,3.0,3.5,4.0,4.5,5.0,5.5,6.0,6.5
62
63         .CLKFX_DIVIDE(10),              // 1 to 32
64         .CLKFX_MULTIPLY(3),             // 2 to 32
65
66         .CLKIN_DIVIDE_BY_2("FALSE"),
67         .CLKIN_PERIOD(`CLOCK_PERIOD),
68         .CLKOUT_PHASE_SHIFT("NONE"),
69         .CLK_FEEDBACK("1X"),
70         .DESKEW_ADJUST("SYSTEM_SYNCHRONOUS"),
71         .DFS_FREQUENCY_MODE("LOW"),
72         .DLL_FREQUENCY_MODE("LOW"),
73         .DUTY_CYCLE_CORRECTION("TRUE"),
74         .PHASE_SHIFT(0),
75         .STARTUP_WAIT("FALSE")
76 ) clkgen_vga (
77         .CLK0(),
78         .CLK90(),
79         .CLK180(),
80         .CLK270(),
81
82         .CLK2X(),
83         .CLK2X180(),
84
85         .CLKDV(),
86         .CLKFX(vga_iclk_dcm),
87         .CLKFX180(vga_iclk_n_dcm),
88         .LOCKED(),
89         .CLKFB(vga_iclk),
90         .CLKIN(sys_clk),
91         .RST(sys_rst),
92
93         .PSEN(1'b0)
94 );
95 AUTOBUF b_p(
96         .I(vga_iclk_dcm),
97         .O(vga_iclk)
98 );
99 AUTOBUF b_n(
100         .I(vga_iclk_n_dcm),
101         .O(vga_iclk_n)
102 );
103
104 ODDR2 #(
105         .DDR_ALIGNMENT("NONE"),
106         .INIT(1'b0),
107         .SRTYPE("SYNC")
108 ) clock_forward (
109         .Q(vga_clk),
110         .C0(vga_iclk),
111         .C1(vga_iclk_n),
112         .CE(1'b1),
113         .D0(1'b1),
114         .D1(1'b0),
115         .R(1'b0),
116         .S(1'b0)
117 );
118
119 vgafb #(
120         .csr_addr(csr_addr),
121         .fml_depth(fml_depth)
122 ) vgafb (
123         .sys_clk(sys_clk),
124         .sys_rst(sys_rst),
125         
126         .csr_a(csr_a),
127         .csr_we(csr_we),
128         .csr_di(csr_di),
129         .csr_do(csr_do),
130         
131         .fml_adr(fml_adr),
132         .fml_stb(fml_stb),
133         .fml_ack(fml_ack),
134         .fml_di(fml_di),
135
136         .dcb_stb(dcb_stb),
137         .dcb_adr(dcb_adr),
138         .dcb_dat(dcb_dat),
139         .dcb_hit(dcb_hit),
140         
141         .vga_clk(vga_iclk),
142         .vga_psave_n(vga_psave_n),
143         .vga_hsync_n(vga_hsync_n),
144         .vga_vsync_n(vga_vsync_n),
145         .vga_r(vga_r),
146         .vga_g(vga_g),
147         .vga_b(vga_b)
148 );
149
150 endmodule